By: anon (anon.delete@this.anon.com), December 9, 2014 11:24 pm
Room: Moderated Discussions
Gabriele Svelto (gabriele.svelto.delete@this.gmail.com) on December 9, 2014 7:31 am wrote:
> Konrad Schwarz (no.spam.delete@this.no.spam) on December 9, 2014 5:12 am wrote:
> > Whic guarantees of a mutex are
> > not provided by atomics with acquire/release semantics,
> > such that a mutex should require more heavyweight instructions?
>
> A mutex enforces sequential consistency, i.e. it must ensure that loads from within
> the section protected by the mutex are not reordered ahead of stores from outside
> of it.
Technically no. A store could be delayed until after the mutex is acquired (i.e., the store which signals the mutex is held), and loads within the critical section could move ahead of that store, so long as they don't move out of the critical section.
> Acquire/release semantics are insufficient to guarantee this.
Mutexes require exactly acquire/release barriers to implement. If you disagree, can you provide a counter example of an ordering allowed by acq/rel that is not allowed for a mutex?
They provide sequential consistency -- but only for memory operations executed within the critical section.
> Konrad Schwarz (no.spam.delete@this.no.spam) on December 9, 2014 5:12 am wrote:
> > Whic guarantees of a mutex are
> > not provided by atomics with acquire/release semantics,
> > such that a mutex should require more heavyweight instructions?
>
> A mutex enforces sequential consistency, i.e. it must ensure that loads from within
> the section protected by the mutex are not reordered ahead of stores from outside
> of it.
Technically no. A store could be delayed until after the mutex is acquired (i.e., the store which signals the mutex is held), and loads within the critical section could move ahead of that store, so long as they don't move out of the critical section.
> Acquire/release semantics are insufficient to guarantee this.
Mutexes require exactly acquire/release barriers to implement. If you disagree, can you provide a counter example of an ordering allowed by acq/rel that is not allowed for a mutex?
They provide sequential consistency -- but only for memory operations executed within the critical section.