Jouni Osmala (josmala.delete@this.cc.hut.fi) on January 11, 2015 4:50 am wrote:
> > > And this proves again that you don't even know what a manycore is. Bye!
> > >
> >
> > Yeah cause its clear that you are the only one that knows that a manycore actually is, LOL! Guess that's
> > why pretty much everyone disagrees with you and thinks you don't understand what you are writing.
> >
>
> While he is quite ignorant about GPU:s. The Book definition of Many-core is several tens to
> hundreds of cores. And xeon-phi fits the description of several tens of cores. The core doesn't
> really need to be designed specifically for many-core to fit definition of many-core.

I know enough about GPUs to get the engineers that do them in agreement.

My book on programming manycores emphasize that you are pursuing a loose definition. I have given a more strict and accurate definition before.

Of course the same book claims that GPUs are in the same class than Phi:

When looking at raw performance alone (total number of instructions executed
within a unit of time), more but less powerful cores clearly outperform chips with
few but powerful cores, within a set power budget. This is a tempting prospect,
especially in domains with abundant parallelism such as networking, graphics, web
servers etc. Accordingly, this category of chips—with many, but simpler cores—is
usually represented by processors targeting a specific domain.

In this chapter we survey some of the best known representatives of this cat-
egory: Tilera’s Tile GX family, NVIDIA’s Graphics Processing Units (GPUs), pi-
coChip’s 200-core DSP as well as Intel’s recently announced Many Integrated Core
(MIC) architecture.

> While people often seem to think many-core and OoO are mutually exclusive, I consider that
> less aggressive OoO with reasonable ISA maybe optimal for many-core.

It is false that people think that. Most heterogeneous manycores use OoO for the LCs.