Intentionally picking a competitors slow part is cheating ...

By: coppice (coppice.delete@this.dis.org), January 13, 2015 7:35 pm
Room: Moderated Discussions
Michael S (already5chosen.delete@this.yahoo.com) on January 13, 2015 10:01 am wrote:
> coppice (coppice.delete@this.dis.org) on January 13, 2015 9:44 am wrote:
> > Michael S (already5chosen.delete@this.yahoo.com) on January 13, 2015 7:53 am wrote:
> > > coppice (coppice.delete@this.dis.org) on January 12, 2015 9:47 pm wrote:
> > > > I forgot that the Intel chips also seemed to take considerably
> > > > more power than the Denver to do the same work.
> > > >
> > >
> > > Do you know it or do you believe it?
> > > The same question goes for your above statement about relative die sizes.
> >
> > I said "seemed" because I have been information on the web which appears to show the Haswell taking
> > considerably more power, but I'm not sure if they were being careful to ensure a fair comparison.
> >
>
> Such measurements are hard to carry even against conventional cores. Denver's code morphing layer
> multiplies the difficulty. The only established test that I am aware of is Spec_SPECpower_ssj2008,
> but Denver is not intended for server market, so it wouldn't be fair to benchmark it against
> Haswell (that most certainly is intended for server market) in that sort of test.

I was thinking of more basic issues in comparing them. You can only measure total chip consumption. Both chips have a large GPU block, and we don't know how much power that might take as the test proceeds. The tests were probably of consumption into the VRM, and VRMs vary massively in their efficiency.

> > If I can trust the various die pictures and quoted dimensions I have found, the Denver core seems a little
> > smaller than the Clovertrail core. Allow for one being 28nm and the other 32nm, and they seem to work out
> > about the same for equivalent geometries. How does the Haswell core size compare with Clovertrail?
>
> I have no idea.
> However, at this level of performance comparing core areas in isolation is meaningless. More so, IMHO, even comparing
> core+L1 areas in isolation is also meaningless, because L2 caches became integral parts of the deal.

I agree. The only part of these chips which is easy to identify and cross out as not being a part of the recipe for CPU compute performance is the GPU. Some value judgement must be applied to everything else, such as my objection to comparing a Haswell with 4M of cache to a Denver with 2M.

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                                                        Intentionally picking a competitors slow part is cheating ...Mark Roulo2015/01/08 05:37 PM
                                                          Intentionally picking a competitors slow part is cheating ...coppice2015/01/08 10:38 PM
                                                            Intentionally picking a competitors slow part is cheating ...Mark Roulo2015/01/09 08:13 AM
                                                              Intentionally picking a competitors slow part is cheating ...Anon2015/01/10 01:00 AM
                                                              Intentionally picking a competitors slow part is cheating ...David Hess2015/01/11 12:03 PM
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                                                              Intentionally picking a competitors slow part is cheating ...coppice2015/01/12 08:45 PM
                                                                Intentionally picking a competitors slow part is cheating ...coppice2015/01/12 08:47 PM
                                                                  Intentionally picking a competitors slow part is cheating ...Michael S2015/01/13 06:53 AM
                                                                    Intentionally picking a competitors slow part is cheating ...coppice2015/01/13 08:44 AM
                                                                      Intentionally picking a competitors slow part is cheating ...Michael S2015/01/13 09:01 AM
                                                                        Intentionally picking a competitors slow part is cheating ...coppice2015/01/13 07:35 PM
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                                                        Why read RWT or Reddit when you can get journalists to do it for you?coppice2015/01/08 09:18 PM
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            ARMv8 getting atomic operationsanon2014/12/04 09:17 PM
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  limited ordernksingh2014/12/04 09:17 PM
    I didn't understand this either. (NT)Konrad Schwarz2014/12/04 09:32 PM
    limited orderdmcq2014/12/05 01:13 AM
    limited orderbakaneko2014/12/05 08:11 AM
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