ARM announces A72

By: anon (anon.delete@this.anon.com), February 5, 2015 12:02 am
Room: Moderated Discussions
Exophase (exophase.delete@this.gmail.com) on February 5, 2015 12:11 am wrote:
> anon (anon.delete@this.anon.com) on February 4, 2015 11:27 pm wrote:
> > Silvermont does not do memory disambiguation, despite Intel having perhaps more experience than
> > anyone with it. Although it is their first gen core, so it's possible they decided to limited
> > some complexities. It does suggest that it's not the lowest hanging of fruit, though.
> >
>
> Like I said, it makes more sense when you go wider. Silvermont is pretty narrow.
>
> > L1I L1D L2
> > A15 (Exynos 5250) 32K,2-way 32K,2-way,4-cycles 1M,16-way,21-cycles
> > A57 48K,3-way 32K,2-way,5-cycles(?) 512K-2M,16-way,??-cycles
> > Denver 128K,4-way 64K,4-way,?-cycles 2M,16-way,18-cycles
> > A8 64K,?-way 64K,?-way,4-cycles 1M,??-way,??-cycles + 4M L3
> > Silvermont 32K,8-way 24K,6-way,3-cycles 1M,16-way,14-cycles
> >
> > I include the A15 only to see the L2 latency at 1MB. A57 may be
> > a little better, but I'm not sure. Anybody has the numbers?
> >
> > So of the modern 64-bit mobile CPUs, I would say A57 has the worst cache hierarchy.
> > Unless the L2 is faster than Silvermont's at 1MB (because its L1 is significantly
> > worse). But I doubt it is, I would say the L2 is closer to 20 cycles than to 10.
> >
>
> Where did you get 5 cycles for A57 L1 dcache,

From gcc machine description. A15 has 4 cycles, which matches known latency, and A57 has 5. I was surprised but I can't find another source.

> or 18 cycles for Denver L2? I can't guess

https://s3.amazonaws.com/piazza-resources/hzbgxhrhoe322v/i2ctm26s481e1/Nvidia_Denverreprint.pdf?AWSAccessKeyId=AKIAJKOQYKAYOBKKVTKQ&Expires=1423126630&Signature=HllKvP2H4aNETDDYleGLpb6uI20%3D

> why A57 would increase latency for a dcache that's otherwise the same.

Repipelining, tuning?

> You have to be
> careful with L2 supplied numbers, they may or may not include the L1 miss cost.

I believe they are all load to use.

>
> Anandtech did some latency tests on A8 here:
>
> http://www.anandtech.com/show/8554/the-iphone-6-review/2
>
> If these numbers are comparable and trustworthy it looks like about 17-18 cycles which isn't
> that great for 1.5GHz peak clock. I think only Intel really looks like they're far ahead.

In L2 latency? Maybe, but the others are far ahead in L1, making L2 less important. So maybe the tradeoff is deliberate. Either way, A57 is easily the worst of them, unless some of the unknown figures are really astonishing.

>
> If you want to see something worse there's Krait 300, with 3 cycle L0 (4KB direct mapped), 6 cycle L1 (16KB
> 4-way) and an asynchronous L2 12 cycle + 14ns, for a whopping 36 cycles at only 1.5GHz. Although Krait 400
> is supposed to have reduced L2 latency, at least (according to AT that was the only change they made)

I thought they are using A57 for their first 64-bit SoCs.
< Previous Post in ThreadNext Post in Thread >
TopicPosted ByDate
ARM announces A72Maynard Handley2015/02/03 11:36 AM
  ARM announces A72anon2015/02/03 12:53 PM
    ARM announces A72Hugo Décharnes2015/02/03 01:20 PM
      ARM announces A72juanrga2015/02/03 04:15 PM
        ARM announces A72Wilco2015/02/04 12:58 AM
          ARM announces A72Eric Bron2015/02/04 01:48 AM
            ARM announces A72none2015/02/04 02:24 AM
              ARM announces A72Eric Bron2015/02/04 02:42 AM
                ARM announces A72Exophase2015/02/04 07:01 AM
                  ARM announces A72Anon2015/02/04 07:35 AM
                    ARM announces A72Exophase2015/02/04 07:58 AM
                      ARM announces A72Groo2015/02/04 09:24 AM
                ARM Marketing, BS up to my earsDavid Kanter2015/02/04 10:51 AM
                  ARM Marketing, BS up to my earsMaynard Handley2015/02/04 01:59 PM
                    ARM Marketing, BS up to my earsDavid Kanter2015/02/04 02:21 PM
                  ARM Marketing, BS up to my earsGroo2015/02/04 02:30 PM
          ARM announces A72juanrga2015/02/04 04:23 AM
            ARM announces A72Wilco2015/02/04 03:01 PM
              ARM announces A72juanrga2015/02/04 04:06 PM
        ARM announces A72Anon2015/02/04 01:28 AM
          ARM announces A72juanrga2015/02/04 04:31 AM
            ARM announces A72Aaron Spink2015/02/04 06:49 AM
      ARM announces A72Ronald Maas2015/02/03 07:23 PM
        ARM announces A72Seni2015/02/04 12:19 AM
          ARM announces A72Maynard Handley2015/02/04 10:42 AM
            ARM announces A72Seni2015/02/04 12:33 PM
              ARM announces A72dmcq2015/02/04 12:57 PM
            ARM announces A72Ronald Maas2015/02/04 06:42 PM
        ARM announces A72anon2015/02/04 05:19 AM
          ARM announces A72Exophase2015/02/04 07:31 AM
            ARM announces A72David Kanter2015/02/04 10:25 AM
              ARM announces A72Exophase2015/02/04 01:33 PM
                ARM announces A72anon2015/02/04 10:27 PM
                  ARM announces A72 (fixed format)anon2015/02/04 10:29 PM
                  ARM announces A72Exophase2015/02/04 11:11 PM
                    ARM announces A72anon2015/02/05 12:02 AM
            ARM announces A72anon2015/02/04 05:57 PM
  ARM announces A72Wilco2015/02/03 01:39 PM
    ARM announces A72Maynard Handley2015/02/03 02:13 PM
      ARM announces A72anon2015/02/03 02:29 PM
      ARM announces A72Wilco2015/02/03 02:44 PM
    ARM announces A72David Kanter2015/02/04 09:56 AM
      ARM announces A72Peter Greenhalgh2015/02/04 10:56 AM
        ARM announces A72Aaron Spink2015/02/04 11:59 AM
          ARM announces A72Alberto2015/02/07 10:22 AM
            ARM announces A72Exophase2015/02/07 10:47 AM
              ARM announces A72Alberto2015/02/07 12:44 PM
                ARM announces A72Exophase2015/02/07 02:35 PM
                  ARM announces A72Alberto2015/02/08 01:09 AM
                    ARM announces A72Exophase2015/02/08 11:05 AM
              ARM announces A72David Kanter2015/02/08 12:39 AM
                ARM announces A72dmcq2015/02/08 04:14 AM
                  ARM announces A72Michael S2015/02/08 04:38 AM
                    ARM announces A72Gabriele Svelto2015/02/10 05:11 AM
                      ARM announces A72Jouni Osmala2015/02/10 11:24 AM
                        slit vs unifiedMichael S2015/02/10 01:57 PM
                          slit vs unifieddmcq2015/02/11 05:44 AM
                  ARM announces A72Doug S2015/02/08 09:00 AM
                ARM announces A72Exophase2015/02/08 10:57 AM
        ARM announces A72dmcq2015/02/04 01:10 PM
        ARM announces A72David Kanter2015/02/04 02:28 PM
      ARM announces A72Wilco2015/02/04 01:59 PM
        ARM announces A72Aaron Spink2015/02/04 09:31 PM
        Intel 32nm vs 14 nmMichael S2015/02/05 01:03 AM
          Intel 32nm vs 14 nmWilco2015/02/05 02:27 AM
            Intel 32nm vs 14 nmDavid Kanter2015/02/05 09:05 AM
              Intel 32nm vs 14 nmcarop2015/02/05 11:12 AM
                Normalize to drawn or effective width?David Kanter2015/02/05 11:45 AM
                  Normalize to drawn or effective width?carop2015/02/05 02:40 PM
                    Normalize to drawn or effective width?David Kanter2015/02/06 12:44 PM
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