Wilco (Wilco.Dijkstra.delete@this.ntlworld.com) on March 7, 2015 9:50 am wrote:
> David Kanter (dkanter.delete@this.realworldtech.com) on March 7, 2015 12:43 am wrote:
> > Wilco (Wilco.Dijkstra.delete@this.ntlworld.com) on March 6, 2015 2:31 pm wrote:
> > > Brett (ggtgp.delete@this.yahoo.com) on March 6, 2015 12:57 pm wrote:
> > > > David Kanter (dkanter.delete@this.realworldtech.com) on March 6, 2015 12:42 am wrote:
> > > > > > A57 is definitely more than 20% faster at the same clock, as you can easily conclude
> > > > > > from various benchmarks (eg. Geekbench shows 40% single threaded gain overall
> > > > > > in AArch32 mode between Galaxy S5 and Galaxy S6 at the same clock).
> > > > >
> > > > > That's a bogus comparison since Geekbench contains lots of AES
> > > > > stuff, and ARM64 contains special instructions for AES.
> > > >
> > > > Are you accusing ARM of pulling an Intel, making sure that benchmarks are dominated
> > > > by feature X right before Intel adds feature X to the instruction set. ;)
> > > >
> > > > This tactic is old hat, blatantly obvious for over a decade. Happy
> > > > to see that ARM is playing by the rules of the CPU market.
> > >
> > > Yeah ARM is to blame, after all Intel only added AES early 2010...
> >
> > I'm not blaming anyone. I'm saying it's ridiculous to make
> > inferences about general performance using benchmarks
> > that are skewed by the presence of AES instructions (that goes for any designs, not just ARM).
>
> Given we all understand exactly how much skew there is, it means you can actually make
> very good inferences. It is also possible to remove the AES result if necessary. It
> doesn't change the fact that A57 shows far more than 20% IPC gain on Geekbench.

Looking at Geekbench again, I'm reminded that it's total crap.

Half their integer benchmarks are image manipulation and crypto stuff.

I have no idea what sobel or dijkstra do, they might be useful.

On the FP side: SGEMM, DGEMM, and mandelbrot are silly.

> > > > > What's the speedup on GCC?
> > > >
> > > > GCC is the worst pointer chasing spaghetti on the planet. You have to brute force tweak hundreds
> > > > of CPU details so as not to get burned by one of a hundred glass jaws that will cripple your
> > > > performance. This takes billions of dollars that AMD does not have, much less tiny ARM.
> > > >
> > > > Unless IBM gets into the ARM64 business Intel is going to dominate the GCC comparison
> > > > for the next two decades, longer than I expect Intel to survive as dominate company.
> > > > $15 SOC's don't generate the sort of revenues that justify optimizing for GCC.
> > >
> > > GCC is a hard benchmark indeed but it's not going to cost billions of dollars to design next
> > > generation CPUs that do better. Did Athlon64 cost billions? All it took was a brilliant design
> > > and a great team to make it happen. The trend is obvious, each new generation of ARM cores improves
> > > by 30-50%. I wonder what would happen if say the Athlon64 designer does an ARM...
> >
> > The IPC for ARM cores is improving much more slowly than that. It's also hard to discuss the overall
> > performance since ARM doesn't control the power management, process, memory controller, etc.
>
> Just consider A8->A9->A15->A57. Geekbench single-threaded result increases 10x from 600MHz A8 to 2.1GHz
> A57. That's a 42% IPC gain per generation plus a 52% clock frequency gain. Are you denying that?

I don't believe that the IPC achieved on Geekbench is representative of anything that matters. Also, as I mentioned...there are many factors outside of the core that matter a lot to performance.

David