By: EduardoS (no.delete@this.spam.com), April 21, 2015 12:51 pm
Room: Moderated Discussions
Maynard Handley (name99.delete@this.name99.org) on April 19, 2015 11:13 am wrote:
> The most interesting and important part of Mill is the (I think correct) intuition that most register data is
> temporary: it's read off the bypass network, goes through an EU, and the result is again read off the bypass
> network. As such, the machinery that exists for giving it a name is pointless overhead, and the ideal situation
> would be an ISA that did not require giving these sorts of temporaries a name, with all that implies.
>
> The question, then, is
> (a) how can you do this?
> (b) how do you deal with the fraction of register data that is NOT of this form?
My name is not Ivan but I can answer the question "b" better than him, data that is not temporary should NOT be stored in registers, it is pretty simple, registers are a fast data storage but also expensive in two aspect:
1) They takes a lot of transistors;
2) Adding registers make every register access slower and takes more energy.
Unless the data is going to be reused in short time (less than the time to perform a store, a load and a few more cycles) than it is not worth to keep this data in registers, if the ISA have so many registers that you can store a lot of trash in them then the processor is wasting resources that could be better used other way.
Also, there are other data stores, both faster and slower than registers, the faster one is not visible in most ISAs: the forwarding network, this one is used to store data that is going to be reused really fast, usually the next cycle, and this is closer to what the "belt" in Mill is, the slower ones are scratch pads, caches and main memory.
> The most interesting and important part of Mill is the (I think correct) intuition that most register data is
> temporary: it's read off the bypass network, goes through an EU, and the result is again read off the bypass
> network. As such, the machinery that exists for giving it a name is pointless overhead, and the ideal situation
> would be an ISA that did not require giving these sorts of temporaries a name, with all that implies.
>
> The question, then, is
> (a) how can you do this?
> (b) how do you deal with the fraction of register data that is NOT of this form?
My name is not Ivan but I can answer the question "b" better than him, data that is not temporary should NOT be stored in registers, it is pretty simple, registers are a fast data storage but also expensive in two aspect:
1) They takes a lot of transistors;
2) Adding registers make every register access slower and takes more energy.
Unless the data is going to be reused in short time (less than the time to perform a store, a load and a few more cycles) than it is not worth to keep this data in registers, if the ISA have so many registers that you can store a lot of trash in them then the processor is wasting resources that could be better used other way.
Also, there are other data stores, both faster and slower than registers, the faster one is not visible in most ISAs: the forwarding network, this one is used to store data that is going to be reused really fast, usually the next cycle, and this is closer to what the "belt" in Mill is, the slower ones are scratch pads, caches and main memory.
