RWT Article: What’s Next for Moore’s Law? For Intel, III+V = 10nm QWFETs

Article: What's Next for Moore's Law? For Intel, III+V = 10nm QWFETs
By: Exophase (exophase.delete@this.gmail.com), April 21, 2015 2:42 pm
Room: Moderated Discussions
It's interesting speculation and does make sense, and III-V integration in 10nm seems natural given presentation made in 2009-2010 (such as http://www.eetimes.com/document.asp?doc_id=1173048), but I think that it's pretty optimistic today. In a later (mid-2013) EETimes article Mike Mayberry states that 10nm is effectively done, but then calls III-V a post-10nm option: http://www.eetimes.com/document.asp?doc_id=1263255&page_number=1 If III-V was going to be part of 10nm then he'd have been deliberately misleading.

(Samsung's ambitions for III-V on their 7nm node are more explicitly confirmed: http://www.eetimes.com/document.asp?doc_id=1323706 but that's not to say they couldn't slip)

I also think that a late 2015 mass production of Intel's 10nm is highly optimistic. Intel's node to node cadence has been gradually increasing in length over the past few cycles, with the last one being nearly 2.5 years. An early 2016 product launch for Cannonlake would put it at maybe 1.5 years after Broadwell, never mind Skylake.

Maybe Intel could actually prioritize Atom as the leading edge product for 10nm. They were long rumored to be doing so with Cherry Trail and 14nm but that hardly ended up being the case.
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RWT Article: What’s Next for Moore’s Law? For Intel, III+V = 10nm QWFETsDavid Kanter2015/04/21 01:53 PM
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