RWT Article: What’s Next for Moore’s Law? For Intel, III+V = 10nm QWFETs

Article: What's Next for Moore's Law? For Intel, III+V = 10nm QWFETs
By: Exophase (exophase.delete@this.gmail.com), April 21, 2015 11:53 pm
Room: Moderated Discussions
anon (anon.delete@this.anon.com) on April 21, 2015 11:24 pm wrote:
> This is no longer exactly true for high performance CPUs. If you halved the power consumption of a device,
> then you could design something equivalent to previous design in performance using fewer transistors.
>

But a major redesign of the CPU uarch is not what Intel has been doing with their ticks. The floorplans look very much like a shrunken version of their last node, this has been consistent for several generations now.

> It's especially not true for mobile when you look at the whole device
> cost, you also reduce cost of battery and thermal design.
>

If we're talking laptops, and even to some extent large tablets, power consumption savings in the CPU are starting hitting diminishing returns for typical use patterns where the CPU isn't heavily loaded that much (so, ie, the display, wifi, and other components take a proportionately larger share of the power consumption). Thermal design costs, maybe, although this isn't something that Intel saves directly on, and instead will have to charge more for the device while convincing OEMs they can save costs here.

> Transistors are so cheap now that 4-8 multithreaded cores and 8-20MB of
> cache is common on a desktop CPU, and laptops are not so far behind.
>
> Selling close to previous design for lower cost has never been Intel's
> game. They've always pushed to improve on designs and maintain prices.
>

The enthusiast line is not common, not cheap, and still lags the mainstream line by several months per generation. The mainstream i7s have not been growing in core count or cache whatsoever over the past few generations. They very much have been selling close to previous design, especially with ticks. Some of the die space has been reclaimed by GPU, but that too is giving way towards overall trending towards smaller die sizes.
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RWT Article: What’s Next for Moore’s Law? For Intel, III+V = 10nm QWFETsDavid Kanter2015/04/21 02:53 PM
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