Kurt Marko (kurt.marko.delete@this.forbes.com) on April 21, 2015 11:34 pm wrote:
> The classic argument for using compound semiconductors is their much higher carrier mobility than pure
> Silicon. Meaning electrons and holes will move faster through a transistor channel at a given voltage.

Bingo. InGaAs/Ge are faster in particular at The relation to 10nm is that one needs to decrease voltage as geometries shrink and III-V compounds will
> offset transistor performance degradation by doing so. There's other stuff going on with this transistor,
> like the use of high-k insulators that also improve scaling, but I haven't had time to study to papers
> to understand the motivation for the complex substrate layers (as shown in the 2009 IEDM paper).

The high-k materials are already in use at 45nm, so this is just continuing existing techniques to control subthreshold and gate leakage.

The number of layers is high for several reasons:

1. A bottom barrier is needed to create quantum confinement, I think it also has to be graded
2. Several of the materials are lattice mismatched
3. Different high-k materials and interfaces are needed

David