By: Maynard Handley (name99.delete@this.name99.org), July 6, 2015 1:09 pm
Room: Moderated Discussions
Maynard Handley (name99.delete@this.name99.org) on July 6, 2015 1:01 pm wrote:
> SHK (no.delete@this.mail.com) on July 6, 2015 12:41 pm wrote:
> > Maynard Handley (name99.delete@this.name99.org) on July 6, 2015 10:25 am wrote:
> >
> > >
> > > The IBM branch over one instruction is neat, but, like you said
> > > for forming immediates, it reflects a hole in the iSA.
> >
> > Power has a conditional move (isel) since v2.06 so a programmer/compiler
> > should choose it over branches if it's just to skip 1-2 instructions.
> >
> > Maybe that kind of hardware optimization is there for old non-recompiled code?
>
>
Yeah, that's what I meant by dusty deck problem.
ARM doesn't have this since I assume everything that's compiled for ARMv8 is using a CSEL aware compiler. A quick scan through the LLVM sources shows that they use CSEL in quite a few instruction sequences, and a file that looks like it's building and optimizing branches is certainly doing something to insert CSEl's into the instruction stream:
http://llvm.org/docs/doxygen/html/AArch64InstrInfo_8cpp_source.html
> SHK (no.delete@this.mail.com) on July 6, 2015 12:41 pm wrote:
> > Maynard Handley (name99.delete@this.name99.org) on July 6, 2015 10:25 am wrote:
> >
> > >
> > > The IBM branch over one instruction is neat, but, like you said
> > > for forming immediates, it reflects a hole in the iSA.
> >
> > Power has a conditional move (isel) since v2.06 so a programmer/compiler
> > should choose it over branches if it's just to skip 1-2 instructions.
> >
> > Maybe that kind of hardware optimization is there for old non-recompiled code?
>
>
Yeah, that's what I meant by dusty deck problem.
ARM doesn't have this since I assume everything that's compiled for ARMv8 is using a CSEL aware compiler. A quick scan through the LLVM sources shows that they use CSEL in quite a few instruction sequences, and a file that looks like it's building and optimizing branches is certainly doing something to insert CSEl's into the instruction stream:
http://llvm.org/docs/doxygen/html/AArch64InstrInfo_8cpp_source.html