Wilco (Wilco.Dijkstra.delete@this.ntlworld.com) on July 6, 2015 4:35 pm wrote:
>
> Wrong - of course it does matter! If there is just a control dependency then the compiler may reorder the loads,
> lift them, CSE them etc (it can't if there is a data dependency).

You really don't get it, do you?

We're talking about binaries being dynamically optimized by the CPU. There may well have been various compiler barriers etc in the source code. There won't be any in the binary, because the data dependency is sufficient. In fact, the compiler may well have been very aware of it (ie the proposed "atomic_load(..., mo_consume)" kind of ordering), and explicitly not having added any memory barriers exactly because the conditional move was a sufficient data depedency.

The point is, dynamically turning a conditional move into a predicted move is actually somewhat subtle on both ARM and Power, because of the odd memory ordering semantics.

But rabidly defending bad ARM designs whether you understand the problem or not - why am I not surprised?

Linus