Sylvain Collange (sylvain.collange.delete.delete@this.this.gmail.com) on July 8, 2015 10:32 am wrote:
> Maynard Handley (name99.delete@this.name99.org) on July 8, 2015 9:46 am wrote:
> > BTW, seeing Andre Seznec's name there, does any commercial
> > processor yet implement a PPM or TAGE-like predictor yet?
>
> I am not aware of any official statement about a commercial TAGE implementation.
>
> But comparing Haswell's performance counters with the output of a TAGE simulator, we observe
> comparable branch misprediction rates on average. (http://hal.inria.fr/hal-01100647/)
>
> Incidentally, at ISCA 2012, André received an Intel Research Impact Medal for his "exemplary work
> on high-performance computer micro-architecture, branch prediction and cache architecture, [that]
> has been of tremendous benefit to Intel, the industry, and the academic community as a whole". :)

He should get a medal for endurance. The man is a paper-generating machine!
(And pretty much all his papers have beautiful, well-explained ideas. None of this "minimum publishable unit" crap.)