By: dmcq (dmcq.delete@this.fano.co.uk), July 12, 2015 10:27 am
Room: Moderated Discussions
anon (anon.delete@this.anon.com) on July 12, 2015 3:42 am wrote:
> Simon Farnsworth (simon.delete@this.farnz.org.uk) on July 10, 2015 1:07 pm wrote:
> > dmcq (dmcq.delete@this.fano.co.uk) on July 9, 2015 4:24 pm wrote:
>
> > On the other hand, the hardware doesn't actually do "memory barrier" operations directly; it passes
> > messages around in the cache coherency protocol (MOESI or similar).
>
> This is not true. Depending on ...
None of what you quoted was written by me, it was written by Simon Farnsworth. The stuff written by someone is under their name and has an extra > before it as for example the 'This is not true. ' etc above was written by anon.
> Simon Farnsworth (simon.delete@this.farnz.org.uk) on July 10, 2015 1:07 pm wrote:
> > dmcq (dmcq.delete@this.fano.co.uk) on July 9, 2015 4:24 pm wrote:
>
> > On the other hand, the hardware doesn't actually do "memory barrier" operations directly; it passes
> > messages around in the cache coherency protocol (MOESI or similar).
>
> This is not true. Depending on ...
None of what you quoted was written by me, it was written by Simon Farnsworth. The stuff written by someone is under their name and has an extra > before it as for example the 'This is not true. ' etc above was written by anon.