By: dmcq (dmcq.delete@this.fano.co.uk), July 21, 2015 1:27 am
Room: Moderated Discussions
Konrad Schwarz (konrad.schwarz.delete@this.siemens.com) on July 21, 2015 12:08 am wrote:
> anon (anon.delete@this.anon.com) on July 20, 2015 7:29 am wrote:
> > Konrad Schwarz (konrad.schwarz.delete@this.siemens.com) on July 20, 2015 4:44 am wrote:
> > > Except that barrier operations are -- at least by default -- global: the store queues of all
> > > coherent CPUs are drained when a (global) barrier instruction is executed (by one CPU).
> >
> > Which CPUs and which barrier instructions might those be?
> >
>
> I know of Power(PC) and ARM.
Some things like freeing a shared page table entry can be a bit of a pain without a bit of clunky support like that, but I would have thought that just using acquire and release type operations would be enough for most tasks - and they refer to a location and so with time stamping or sequencing of such operations one needn't do anything if the location was updated long enough ago.
> anon (anon.delete@this.anon.com) on July 20, 2015 7:29 am wrote:
> > Konrad Schwarz (konrad.schwarz.delete@this.siemens.com) on July 20, 2015 4:44 am wrote:
> > > Except that barrier operations are -- at least by default -- global: the store queues of all
> > > coherent CPUs are drained when a (global) barrier instruction is executed (by one CPU).
> >
> > Which CPUs and which barrier instructions might those be?
> >
>
> I know of Power(PC) and ARM.
Some things like freeing a shared page table entry can be a bit of a pain without a bit of clunky support like that, but I would have thought that just using acquire and release type operations would be enough for most tasks - and they refer to a location and so with time stamping or sequencing of such operations one needn't do anything if the location was updated long enough ago.
