By: Konrad Schwarz (konrad.schwarz.delete@this.siemens.com), July 22, 2015 1:37 am
Room: Moderated Discussions
Konrad Schwarz (konrad.schwarz.delete@this.siemens.com) on July 22, 2015 12:35 am wrote:
> anon (anon.delete@this.anon.com) on July 21, 2015 8:17 am wrote:
> > I can't see where the need would be,
>
> I think this definition reflect the most relaxed definition of coherency that allows
> a causal ordering and suspect it is mostly a theoretical ideal -- that allows one to prove
> the correctness of various shared memory "lock free" algorithms.
> Practical implementations will be much simpler, e.g.,
> simply cause all processors to flush their store queues.
Also, I think this definition means that a thread can be rescheduled on a different processor
while in the midst of a critical section and without requiring the context switch
to execute a barrier.
> anon (anon.delete@this.anon.com) on July 21, 2015 8:17 am wrote:
> > I can't see where the need would be,
>
> I think this definition reflect the most relaxed definition of coherency that allows
> a causal ordering and suspect it is mostly a theoretical ideal -- that allows one to prove
> the correctness of various shared memory "lock free" algorithms.
> Practical implementations will be much simpler, e.g.,
> simply cause all processors to flush their store queues.
Also, I think this definition means that a thread can be rescheduled on a different processor
while in the midst of a critical section and without requiring the context switch
to execute a barrier.
