Are you kidding?

By: Wouter Tinus (wouter.tinus.delete@this.gmail.com), October 5, 2015 1:25 pm
Room: Moderated Discussions
juanrga (nospam.delete@this.juanrga.com) on October 5, 2015 10:46 am wrote:
> You said that Skylake is
>
> > > > - 5 wide decode
> > > > - 6 wide allocation/decoder queue
> > > > - 6 wide ROB
> > > > - 8 wide issue
> > > > - 8 wide retire (4/thread)
>
> Using retire as metric, Skylake is then 8-wide. Haswell/Broadwell can
> also retire up to 8 uops per cycle. Thus both are 8-wide as well.

Are you kidding now? You multiply Haswells number by 2x because of your "unfused" reasoning, but then compare it to Skylakes number *without* doing the same multiplication, and then claim with a straight face that "thus" they are the same width?

> There is no way that Skylake can issue and retire 16 ops per cycle, and Anandtech don't say the contrary.

We weren't talking about issue at all. And for the record I don't think we should call Skylake 16 wide either, but it *does* follow from *your* logic of multiplying Haswells 4-wide retire rate by 2x, and the fact that Skylake doubled Haswells peak rate.
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TopicPosted ByDate
Update to Intel Optimization ManualSHK2015/09/29 05:38 AM
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      Update to Intel Optimization ManualAnon2015/09/29 02:23 PM
    Update to Intel Optimization Manualnone2015/09/29 10:31 PM
      Update to Intel Optimization ManualMichael S2015/09/30 04:24 AM
    Update to Intel Optimization ManualMichael S2015/09/30 04:30 AM
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  5-6 wide core, why no mention from Intel?Wouter Tinus2015/09/30 02:14 PM
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        5-6 wide core, why no mention from Intel?anon2015/10/01 02:21 AM
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            5-6 wide core, why no mention from Intel?anon2015/10/01 05:27 AM
              5-6 wide core, why no mention from Intel?Alberto2015/10/01 08:33 AM
                5-6 wide core, why no mention from Intel?juanrga2015/10/01 10:24 AM
        5-6 wide core, why no mention from Intel?Maynard Handley2015/10/01 08:57 AM
    5-6 wide core, why no mention from Intel?juanrga2015/10/01 03:59 AM
      5-6 wide core, why no mention from Intel?Wouter Tinus2015/10/01 02:48 PM
        5-6 wide core, why no mention from Intel?juanrga2015/10/03 03:17 AM
          5-6 wide core, why no mention from Intel?Wouter Tinus2015/10/03 11:19 AM
            Are you kidding? (NT)juanrga2015/10/04 05:30 AM
              Are you kidding?Wouter Tinus2015/10/04 03:18 PM
                Are you kidding?juanrga2015/10/05 09:46 AM
                  Are you kidding?David Kanter2015/10/05 11:24 AM
                    Are you kidding?anon2015/10/05 09:26 PM
                    Are you kidding?Linus Torvalds2015/10/07 04:49 AM
                      Are you kidding?juanrga2015/10/07 10:46 AM
                        Are you kidding?anon2015/10/07 06:21 PM
                  Are you kidding?Wouter Tinus2015/10/05 01:25 PM
                    Are you kidding?juanrga2015/10/06 10:17 AM
                      Are you kidding?Stubabe2015/10/07 12:17 AM
                        Are you kidding?juanrga2015/10/07 10:56 AM
                          Amazing...Wouter Tinus2015/10/07 11:31 AM
                            Amazing...juanrga2015/10/07 03:45 PM
                          Are you kidding?Stubabe2015/10/07 11:57 AM
                            Are you kidding?juanrga2015/10/07 03:59 PM
                          Are you kidding?Wilco2015/10/07 02:07 PM
                            Are you kidding?juanrga2015/10/07 04:33 PM
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        5-6 wide core, why no mention from Intel?David Kanter2015/10/01 03:49 PM
          5-6 wide core, why no mention from Intel?Maynard Handley2015/10/01 06:21 PM
          5-6 wide core, why no mention from Intel?Exophase2015/10/01 10:07 PM
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                5-6 wide core, why no mention from Intel?Maynard Handley2015/10/02 09:37 AM
                  5-6 wide core, why no mention from Intel?noko2015/10/02 05:19 PM
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              5-6 wide core, why no mention from Intel?Wilco2015/10/02 02:26 PM
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              5-6 wide core, why no mention from Intel?Wilco2015/10/02 02:59 PM
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                            LDP/STP usage in AArch64 for 403.gccnone2015/10/03 04:37 AM
                              LDP/STP usage in AArch64 for 403.gccWilco2015/10/03 05:26 AM
                  5-6 wide core, why no mention from Intel?Maynard Handley2015/10/02 04:24 PM
              5-6 wide core, why no mention from Intel?Maynard Handley2015/10/02 03:07 PM
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    Update to Intel Optimization Manualanon2015/09/30 10:49 PM
    Update to Intel Optimization Manualnone2015/09/30 10:50 PM
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      Update to Intel Optimization ManualPatrick Chase2015/10/01 04:16 PM
        Update to Intel Optimization Manualanon2015/10/01 10:45 PM
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