By: none (none.delete@this.none.com), October 30, 2015 6:16 am
Room: Moderated Discussions
dmcq (dmcq.delete@this.fano.co.uk) on October 30, 2015 6:09 am wrote:
[...]
> Thinking about it I would guess ARM will eventually put in some 256 bit operations
> which act on a pair of SIMD registers at once rather than extending the SIMD registers,
> that is what they did for ARMv7 to get 128 bit using 64 bit registers.
That would somehow go backward: you don't want to alias registers as this creates
complexities in particular for dependence tracking and renaming. ARM got rid of these
aliases when designing AArch64 and IMHO that was a wise decision.
[...]
> Thinking about it I would guess ARM will eventually put in some 256 bit operations
> which act on a pair of SIMD registers at once rather than extending the SIMD registers,
> that is what they did for ARMv7 to get 128 bit using 64 bit registers.
That would somehow go backward: you don't want to alias registers as this creates
complexities in particular for dependence tracking and renaming. ARM got rid of these
aliases when designing AArch64 and IMHO that was a wise decision.
