By: juanrga (nospam.delete@this.juanrga.com), October 31, 2015 6:20 am
Room: Moderated Discussions
Heikki Kultala (hkultala.delete@this.iki.fi) on October 30, 2015 3:45 pm wrote:
> > The real reason why AMD Zen is stuck with 128bit units can be cache/memory bottlenecks or Skybridge
> > (pin and inside compatibility of both K12 and Zen) or simply saving die space or .
>
> The width of the FPU's has nothing to do with the external pins of the
> processor. There are zillion different-width buses between them.
>
>
Textbook-example of straw-man fallacy. You took my sketchy description of the Skybridge project, then cherry-picked the "pin" part, ignored the "and inside" part, and wrote giving the impression of refuting my argument, while actually refuting an argument which was not advanced by me.
I will try again to explain my argument.
Skybridge was AMD project for pin and inside compatibility between ARM and x86 products. Pin compatibility would produce a socket compatible for both the ARM and the x86 SoCs from AMD.
Inside compatibility would produce a set of ARM and x86 cores easily interchangeable inside the SoC for simplifying AMD business (specially the semicustom division). You can get the concept on this diagram applied to 'small' cores

Same about 'big' cores, indeed Zen was presented as the "sister core" of K12.
AMD couldn't release a K12 core with 128bit SIMD units and a Zen core with 256bit SIMD units within the Skybridge project, because that hypothetical Zen would require wider datapaths, wider memory units, higher cache throughput,... ruining the lego-like replacement.
But Skybridge was finally canceled. Thus maybe the reason for Zen having 128bit units is some of those other reasons mentioned above.
> > The real reason why AMD Zen is stuck with 128bit units can be cache/memory bottlenecks or Skybridge
> > (pin and inside compatibility of both K12 and Zen) or simply saving die space or .
>
> The width of the FPU's has nothing to do with the external pins of the
> processor. There are zillion different-width buses between them.
>
>
Textbook-example of straw-man fallacy. You took my sketchy description of the Skybridge project, then cherry-picked the "pin" part, ignored the "and inside" part, and wrote giving the impression of refuting my argument, while actually refuting an argument which was not advanced by me.
I will try again to explain my argument.
Skybridge was AMD project for pin and inside compatibility between ARM and x86 products. Pin compatibility would produce a socket compatible for both the ARM and the x86 SoCs from AMD.
Inside compatibility would produce a set of ARM and x86 cores easily interchangeable inside the SoC for simplifying AMD business (specially the semicustom division). You can get the concept on this diagram applied to 'small' cores

Same about 'big' cores, indeed Zen was presented as the "sister core" of K12.
AMD couldn't release a K12 core with 128bit SIMD units and a Zen core with 256bit SIMD units within the Skybridge project, because that hypothetical Zen would require wider datapaths, wider memory units, higher cache throughput,... ruining the lego-like replacement.
But Skybridge was finally canceled. Thus maybe the reason for Zen having 128bit units is some of those other reasons mentioned above.