lurker (lurker9000.delete@this.realemail.mail) on October 30, 2015 2:09 pm wrote:
> juanrga (nospam.delete@this.juanrga.com) on October 30, 2015 12:43 pm wrote:
>
> > The point is not how many AGUs the core has. The point is on which
> > is the ratio of AGUs to rest of execution units. For instance:
> >
> > - Excavator has 2 AGU and 2 ALU.
> >
> > - Power 8 has four memory units (2 load/store plus 2 loads) and 2 integer units.
> >
> > - SPARC X+ has 2 memory units and 2 integer units.
> >
> > - Trace-7 has 2 memory units and 2 integer units. Trace-14 has 4 memory units
> > and 4 integer units. Trace-28 has 8 memory units and 8 integer units.
> >
> > Those designs look balanced. However a hypothetical design with 6 ALU and 1
> > AGU would be rather unbalanced, which most of ALUs being idle most of time.
> >
> > Therefore 2 AGUs can be enough for some design but not enough for other.
> >
> > It also depends of the ISA and of the type of workload.
> >
> > For instance about a third of total ops of mobile applications for ARM are loads/stores. However, SPECFP
> > for x86 requires about one half. Server applications for
> > ARM require more loads/stores than mobile applications
> > for the same ISA. Some HPC applications require more load/store ops than SPECFP. And so on.
> >
> > Cyclone is a six-issue ARM chip oriented to mobile; therefore, its
> > 2 AGU + 4ALU configuration looks balanced regarding ALU:mem ratio.
> >
> > 2/2+4 = 1/3.
> >
> > On the other hand, Vulkan which is also six-issue but address server applications is a 3ALU + 3mem core
> > with 2 load/store units and 1 store-data unit. This ARM server design is more close to 1:1 ratio.
> >
> > Zen 4ALU+2AGU looks unbalanced to me for a x86 server/HPC architecture.
>
> Well as David said in another post, it could be that "AMD isn't intending to hit the
> HPC market" and "So giving up on a third AGU makes sense. The third AGU is probably
> most helpful for HPC (where they cannot compete anyway) and isn't a particularly small
> unit in terms of design complexity and impact on the load/store buffer.".
>
> I'm honestly not too informed about how hardware works in detail, so thanks for the informative
> post, I just came here to say what a trustworthy guy told me. I'm not sure what Zen was targeting,
> whether the whole core met expectations or just the part that his team was working on. I guess
> it could just be that they weren't aiming for HPC with Zen core, rather markets they can win
> back easier(desktop/mobile and mid-range servers). But since Zen is probably going to release
> within a year, I guess we'll find out more details from AMD themselves soon.

I tried to explain that what matters is not the total number of memory units but the ratio between different execution units, the ISA, and the workloads.

As explained before 2AGU+4ALU looks fine for ARM mobile SoC. 2AGU+4ALU looks unbalanced for x86 server SoC.

Same stuff about HPC. A third AGU is not obligatory for HPC. Intel's Borkar just gave a recent talk about his vision for a future supercomputer much faster than actual. The HPC core that he proposes has only one AGU, and that is fine because his core has a 1:1 ratio for FP:mem.

Fujitsu presented this year the new CPU that will replace the old CPU in the successful K-computer. This new CPU, the XIfx, is exclusively optimized for HPC and each core has 2 AGUs. Again fine because it has a 1:1 ratio for FP:mem...

But this discussion about HPC is rather irrelevant, because we know that AMD will not use CPUs for HPC. AMD will propose HSA APUs.

About markets Zen can win back easier. I know none. I am rather convinced that HPC Zen-based APUs will fail. Zen on AM4 APUs for desktop/mobile will be too late and competing against Kabylake/Cannonlake. Zen AM4 for CPUs will be competing with Skylake-E CPUs for a niche market: HEDT. And I guess Zen on servers will be crushed by both sides: ARM (Qualcomm, Broadcom, APM,...) and x86 (Intel).