By: Gabriele Svelto (gabriele.svelto.delete@this.gmail.com), August 1, 2016 5:48 am
Room: Moderated Discussions
Dan (dzhang50.delete@this.hotmail.com) on August 1, 2016 3:12 am wrote:
> What are the pros/cons to using tile-based rasterizers vs. conventional rasterizers?
> Tile-based seems to be more power efficient, but what's the tradeoff?
One of the most important tradeoffs is memory usage (and bandwidth) for storing and reading the command streams. A tile-based render cannot consume the command stream directly, it needs to store the primitives covering each tile it in memory so that it can later go over them for rendering (I'm simplifying here, the primitives do not include only the geometry but also all the additional state required for drawing such as the shader, uniforms, etc...).
So first of all TBRs tend to use more memory compared to IMRs though they often employ techniques to reduce the size of the geometry bins. Hierarchical tile-bins are common as well as compression techniques so that each bin doesn't contain too much redundant data (e.g. state that is common to multiple primitives).
Besides memory use there's also a bandwidth tradeoff: in general drawing into an on-chip tile saves external bandwidth but that holds true only if the BW saved for drawing the primitive is less than the BW required for writing and reading to the tile bin. In case of very small primitives this might not be true, with tiling being detrimental from a BW perspective. IIRC PowerVRs go to great lengths to reduce this by discarding primitives that won't yield any visible pixels very early (I'm not talking about pixel-by-pixel overdraw here, I'm talking about removing primitives so small - or so thin - that they won't generate any visible fragments or trivially covered by other primitives).
> What are the pros/cons to using tile-based rasterizers vs. conventional rasterizers?
> Tile-based seems to be more power efficient, but what's the tradeoff?
One of the most important tradeoffs is memory usage (and bandwidth) for storing and reading the command streams. A tile-based render cannot consume the command stream directly, it needs to store the primitives covering each tile it in memory so that it can later go over them for rendering (I'm simplifying here, the primitives do not include only the geometry but also all the additional state required for drawing such as the shader, uniforms, etc...).
So first of all TBRs tend to use more memory compared to IMRs though they often employ techniques to reduce the size of the geometry bins. Hierarchical tile-bins are common as well as compression techniques so that each bin doesn't contain too much redundant data (e.g. state that is common to multiple primitives).
Besides memory use there's also a bandwidth tradeoff: in general drawing into an on-chip tile saves external bandwidth but that holds true only if the BW saved for drawing the primitive is less than the BW required for writing and reading to the tile bin. In case of very small primitives this might not be true, with tiling being detrimental from a BW perspective. IIRC PowerVRs go to great lengths to reduce this by discarding primitives that won't yield any visible pixels very early (I'm not talking about pixel-by-pixel overdraw here, I'm talking about removing primitives so small - or so thin - that they won't generate any visible fragments or trivially covered by other primitives).