By: vvid (no.delete@this.thanks.com), August 1, 2016 9:45 am
Room: Moderated Discussions
Nvidia uses tiles since ~NV20.
These small rectangles on video are ROP tiles (collection of pixels placed at adjacent location in the same memory bank) and can be compressed (nv40+).
http://www.google.ch/patents/US7545382
http://www.freepatentsonline.com/y2015/0154733.html
https://kernel.googlesource.com/pub/scm/linux/kernel/git/mchehab/linux-media/+/media/v4.7-2/drivers/gpu/drm/nouveau/nvkm/subdev/fb/nv40.c
Specific ordering pattern is likely a result of non-linear (swizzled) memory layout of ROP tiles grouped in a second level structure.
AMD uses 8x8 tiles. It is highly intergrated with HSR system.
These small rectangles on video are ROP tiles (collection of pixels placed at adjacent location in the same memory bank) and can be compressed (nv40+).
http://www.google.ch/patents/US7545382
http://www.freepatentsonline.com/y2015/0154733.html
https://kernel.googlesource.com/pub/scm/linux/kernel/git/mchehab/linux-media/+/media/v4.7-2/drivers/gpu/drm/nouveau/nvkm/subdev/fb/nv40.c
Specific ordering pattern is likely a result of non-linear (swizzled) memory layout of ROP tiles grouped in a second level structure.
AMD uses 8x8 tiles. It is highly intergrated with HSR system.