By: Montaray Jack (none.delete@this.none.org), August 4, 2016 11:47 am
Room: Moderated Discussions
David Kanter (dkanter.delete@this.realworldtech.com) on August 4, 2016 8:03 am wrote:
> dglow (nobody.delete@this.nowhere.none) on August 2, 2016 5:08 pm wrote:
> > Montaray Jack (none.delete@this.none.org) on August 2, 2016 10:35 am wrote:
> > > I think this DirectX implementation of this program is flawed, Christoph Riccio's
> > > earlier OpenGL versions definitely showed different patterns. Admittedly, I didn't
> > > look at the program, but it might be doing something wrong with atomic counters.
> > >
> > > http://www.g-truc.net/post-0597.html
> > >
> > > Haswell, Kepler and Southern Islands are covered in this post.
> >
> >
> > Thank you for this link.
> >
> > Christoph Riccio writes that "Kepler works using 4 by 8 pixel vertical blocks." If these
> > blocks are the same 'rasterization tiles' Mr. Kanter points to in his video, then the thesis
> > of Nvidia introducing tile-based rasterizers "starting with Maxwell" is false.
>
> > Mr. Kanter, how do you respond? Your news was picked up by Ars Technica and widely disseminated.
> >
> > Is this a tempest in a teapot?
>
> 4x8 = 1 warp = scheduling unit of a core, and he is talking about pixel shading.
> The tiles I am talking about are for rasterization and larger (e.g., 512x512).
>
> David
The pixel shaders are roughly encoding time or cycles elapsed in g-truc's program, the rest is more or less the same. Without access to the debug registers and the cycle counters on the GPU, it seems a reasonable choice.
> dglow (nobody.delete@this.nowhere.none) on August 2, 2016 5:08 pm wrote:
> > Montaray Jack (none.delete@this.none.org) on August 2, 2016 10:35 am wrote:
> > > I think this DirectX implementation of this program is flawed, Christoph Riccio's
> > > earlier OpenGL versions definitely showed different patterns. Admittedly, I didn't
> > > look at the program, but it might be doing something wrong with atomic counters.
> > >
> > > http://www.g-truc.net/post-0597.html
> > >
> > > Haswell, Kepler and Southern Islands are covered in this post.
> >
> >
> > Thank you for this link.
> >
> > Christoph Riccio writes that "Kepler works using 4 by 8 pixel vertical blocks." If these
> > blocks are the same 'rasterization tiles' Mr. Kanter points to in his video, then the thesis
> > of Nvidia introducing tile-based rasterizers "starting with Maxwell" is false.
>
> > Mr. Kanter, how do you respond? Your news was picked up by Ars Technica and widely disseminated.
> >
> > Is this a tempest in a teapot?
>
> 4x8 = 1 warp = scheduling unit of a core, and he is talking about pixel shading.
> The tiles I am talking about are for rasterization and larger (e.g., 512x512).
>
> David
The pixel shaders are roughly encoding time or cycles elapsed in g-truc's program, the rest is more or less the same. Without access to the debug registers and the cycle counters on the GPU, it seems a reasonable choice.