Maynard Handley (name99.delete@this.name99.org) on August 14, 2016 7:47 am wrote:
> I like beating up on Linus and/or x86 as much as the next person, but this rant is beyond
> the pale. You allude to a whole bunch of issues (value of trace cache, existence of instructions
> that persist profiling data IN the CPU, etc) that have no existence whatever in the commercial
> world, and accept your sneering to be good enough for us to believe you.

An x86 conditional jump instruction I had in mind might conceptually look like this:

je %al, label

where register %al contains information about the jump instruction.

%al is filled by the compiler and/or by the programmer, for example:

%al mod 3 == 0: predicted to take the 1st route
%al mod 3 == 1: predicted to take the 2nd route
%al mod 3 == 2: predicted to take the 1st route (%al >> 2) times and then the 2nd route
%al mod 3 == 3: no prediction

Another example:

%rax mod 3 == 0: predicted to take the 1st route now
%rax mod 3 == 1: predicted to take the 2nd route now
%rax mod 3 == 2,3: no prediction
(%rax >> 2) mod 3 == 0: predicted to take the 1st route on the next execution
(%rax >> 2) mod 3 == 1: predicted to take the 2nd route on the next execution
(%rax >> 2) mod 3 == 2,3: no prediction
(%rax >> 4) mod 3 == ...