Branch/jump target prediction

By: Megol (golem960.delete@this.gmail.com), August 19, 2016 3:23 am
Room: Moderated Discussions
⚛ (0xe2.0x9a.0x9b.delete@this.gmail.com) on August 16, 2016 6:40 am wrote:
> Linus Torvalds (torvalds.delete@this.linux-foundation.org) on August 14, 2016 10:40 am wrote:
> > ⚛ (0xe2.0x9a.0x9b.delete@this.gmail.com) on August 14, 2016 5:24 am wrote:
> > > You know which branches are predictable from the programmer and/or from the previous
> > > runs.
> >
> > Bullshit again.
> >
> > This has been disproven over and over again.
> >
> > Programmers really don't know. They get it wrong all the time. There are
> > academic papers on it, if you don't trust the real world experience.
> >
> > Profile-directed compilers do know, but generally only for a well-defined set of inputs,
> > and we've seen them get it horribly wrong. Even on trivial benchmarks like Spec. You
> > get nice PGO speedups for the benchmark, and much less nice for real world.
> >
> > In the real world, every single "let's tell the CPU what the prediction is" has been a
> > complete disaster. There are no sane CPU designers that believe in that fairy tale.
> >
> > Just as an example, Intel for a while had this notion of using instruction prefixes
> > to let people mark branch prediction information. Guess what? It's not used
> > by current CPU's because it quickly turned out to be pure garbage.
>
> The outcome of a conditional branch depends on data (not on code). An instruction prefix can help branch prediction
> only if the prefix is mentioning a register or a memory location containing the prediction(s).

The P4 used dynamic prediction. The prefixes were to avoid startup flushes, something very important for a processor with only a trace cache where failed static predictions when first seeing a branch leads to large overheads due to trace flushing etc. The overheads are much smaller for a traditional OoO core and so prefixes doesn't really help. Also the state of art in branch prediction have improved since the P4, there are some indications current Intel processors use something similar to the TAGE predictor.
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TopicPosted ByDate
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                Just a thoughtAnon2016/08/16 07:45 AM
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                Branch/jump target predictionRicardo B2016/08/16 06:39 AM
                  Branch/jump target prediction -82016/08/16 08:23 AM
                    Branch/jump target prediction -8anon2016/08/16 09:09 AM
                    Branch/jump target prediction -8Ricardo B2016/08/16 09:33 AM
                      Branch/jump target prediction -8Exophase2016/08/16 10:02 AM
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                        Branch/jump target prediction -8Gabriele Svelto2016/08/17 02:52 AM
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                      Branch/jump target prediction -82016/08/18 05:21 PM
                        Branch/jump target prediction -8Maynard Handley2016/08/18 06:27 PM
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                          Branch/jump target prediction -8Michael S2016/08/19 05:39 AM
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                                Branch/jump target prediction -8Exophase2016/08/19 10:03 AM
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                            Branch/jump target prediction -8David Kanter2016/08/19 11:23 PM
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                            Branch/jump target prediction -8David Kanter2016/08/22 11:05 PM
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                  The (apparent) state of trace caches on modern CPUsExophase2016/08/22 07:55 PM
                    The (apparent) state of trace caches on modern CPUsanon2016/08/22 11:36 PM
                      The (apparent) state of trace caches on modern CPUsExophase2016/08/23 04:08 AM
                        The (apparent) state of trace caches on modern CPUsanon2016/08/23 08:51 PM
                          The (apparent) state of trace caches on modern CPUsExophase2016/08/23 10:12 PM
                          The (apparent) state of trace caches on modern CPUsMaynard Handley2016/08/24 06:38 AM
                            The (apparent) state of trace caches on modern CPUsanon2016/08/24 07:26 PM
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                      The (apparent) state of trace caches on modern CPUsanon2016/08/23 08:54 PM
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                    The (wrong) state of trace caches on modern CPUsMichael S2016/08/25 02:28 AM
                      The (wrong) state of trace caches on modern CPUsEric Bron2016/08/25 06:12 AM
                      The (wrong) state of trace caches on modern CPUsMaynard Handley2016/08/25 08:50 AM
                        The (wrong) state of trace caches on modern CPUsMichael S2016/08/25 09:36 AM
                          The (wrong) state of trace caches on modern CPUsExophase2016/08/25 10:32 AM
                        The (wrong) state of trace caches on modern CPUsEric Bron2016/08/25 10:12 AM
                          The (wrong) state of trace caches on modern CPUsMaynard Handley2016/08/25 11:01 AM
                            The (wrong) state of trace caches on modern CPUsEric Bron2016/08/25 11:20 AM
                              The (wrong) state of trace caches on modern CPUsMaynard Handley2016/08/25 12:34 PM
        Branch/jump target predictionGabriele Svelto2016/08/11 12:15 PM
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