By: Maynard Handley (name99.delete@this.name99.org), August 24, 2016 7:38 am
Room: Moderated Discussions
anon (anon.delete@this.anon.com) on August 23, 2016 9:51 pm wrote:
> Exophase (exophase.delete@this.gmail.com) on August 23, 2016 5:08 am wrote:
> > anon (anon.delete@this.anon.com) on August 23, 2016 12:36 am wrote:
> > > ARM since about Cortex A9 has used a post decode loop buffer, and I think they still do on their 64
> > > bit uarchs. Even on that ISA, icache, fetch, decode use a large proportion of total core power.
> > >
> >
> > There's a pretty big difference between a loop buffer and a uop cache.
>
> Why trim the context of my reply? The thread is there for everybody to read.
>
Oh, the irony.
This happens to you, and you complain about it. Then THREE MINUTES LATER you tell me I'm getting my just desserts when the same thing happens to me...
http://www.realworldtech.com/forum/?threadid=159985&curpostid=160222
Was there ever a more perfect example of the fundamental attribution error?
> Exophase (exophase.delete@this.gmail.com) on August 23, 2016 5:08 am wrote:
> > anon (anon.delete@this.anon.com) on August 23, 2016 12:36 am wrote:
> > > ARM since about Cortex A9 has used a post decode loop buffer, and I think they still do on their 64
> > > bit uarchs. Even on that ISA, icache, fetch, decode use a large proportion of total core power.
> > >
> >
> > There's a pretty big difference between a loop buffer and a uop cache.
>
> Why trim the context of my reply? The thread is there for everybody to read.
>
Oh, the irony.
This happens to you, and you complain about it. Then THREE MINUTES LATER you tell me I'm getting my just desserts when the same thing happens to me...
http://www.realworldtech.com/forum/?threadid=159985&curpostid=160222
Was there ever a more perfect example of the fundamental attribution error?