anonymou5 (no.delete@this.spam.com) on October 21, 2016 6:44 pm wrote:
> > http://blogs.barrons.com/techtraderdaily/2016/10/21/apples-a10-iphone-chip-smokes-the-competition-says-linley-group/
>
> How are they coming up with 11.6 mm^2 for Broadwell?
>
> If you count pixels in the public die pics, it's more
> like 5.35 x 1.90 = 10.165 mm^2 for the core+LLC slice,
> and more like 3.50 x 1.75 = 6.125 mm^2 for the core.
>
> For Skylake, it's 4.15 * 2.85 = 11.8275 mm^2 including
> the LLC and 3.70 x 2.20 = 8.14 mm^2 for the core, and
> for Kabylake it's 4.10 * 2.80 = 11.48 mm^2 and 3.65 x
> 2.20 = 8.03 mm^2. (Realistically... no change at all.)
>
> Trying to cut out the L2 caches from these... I do not
> have the patience for tonight, sorry. :)

If the 11.6 mm^2 data point is accurate, why is Intel's Broadwell core so much bigger than Apple's A10 Hurricane core?

It would appear that it is much less area efficient than Hurricane. The only reasons I can think of are:

1. Intel is using bigger transistors (more fins) in order reach the significantly higher frequencies of Broadwell compared to Hurricane.

2. x86 to RISC translation transistor overhead (but I am skeptical that this amounts to anything significant)

3. Other microarchitectural complexity needing a larger transistor budget.

The article claims that the Hurricane core's IPC is equivalent to Skylake's (let alone Broadwell) so if this is true, the A10 appears to be a technical marvel.

Any insight from more experienced CPU designers (or anyone else) would be highly appreciated.