juanrga (noemail.delete@this.juanrga.com) on October 31, 2016 4:35 am wrote:
> Travis (travis.downs.delete@this.gmail.com) on October 30, 2016 6:34 pm wrote:
> > juanrga (noemail.delete@this.juanrga.com) on October 29, 2016 9:47 pm wrote:
> > > anon (spam.delete.delete@this.this.spam.com) on October 28, 2016 4:13 am wrote:
> > > > juanrga (noemail.delete@this.juanrga.com) on October 28, 2016 2:02 am wrote:
> > >
> > >

My point is that Apple can target 4GHz for some future chip, miss some few IPC percents
> > > compared to current designs and then recover those percents via hardware improvements.

> > >
> >
> > Your claim doesn't make a lot of sense. The point is that frequency and IPC exist two somewhat
> > opposite points in the multi-dimensional tradeoff space used in CPU design - more "brainy"
> > designs may give up frequency to get more IPC.
>
> You are repeating what I said before. I wrote there is inverse relation between
> IPC and frequency, and I wrote that this inverse relation is the basis for
> the traditional definition of speed-demons and brainiac desings.
>
> > The main point made was that you can't simply evaluate in a quantitative way the coefficients in this
> > tradeoff (i.e., how much IPC you gain by reducing f) by taking an existing chip and downclocking it!
> > That will only give a small IPC boost due to decreased relative DRAM latency (and perhaps L3 or L4
> > latency for systems where those caches are in a separate clock domain). The main IPC benefit to reduced
> > frequencies is missed: the ability to use the longer clock cycles to stuff in more logic per pipeline
> > stage, to reduce the number of pipeline stages, to increase cache sizes, whatever.
>
> That wasn't the point.
>
> We are not saying that taking a given F chip and underclocking it to F/2 gives
> a measure of the IPC that would have a chip initially designed for F/2.
>
> This is the second time that my point is ignored.
>
> > Claiming that the same logic works in reverse is nonsensical - you can't just upclock a 2 Ghz design
> > to 4 Ghz, unless the design was terrible and left a lot on the table in the first place...
>
> I didn't write that same logic applies. I said that essentially the same law
> applies to the IPC/F relation, but with different parameters, of course.
>
> I think here the confusion here relies on that I am considering a single law with different parameters,
> whereas some of you are taking the different expressions with different parameters as different laws.

The confusion seems to be that you believe that a chip designed for 2 GHz can be overclocked to 4 GHz at all. This is not a given (unlike underclocking a chip designed for 4 GHz to 2 GHz), and thus the relationship, while trivially true, is also worthless.

Put another way, if I say that the energy cost of cycling at 20 kph is 120 J/km, and the energy cost of driving my car at 80 kph is 2 MJ/km, but the energy cost of driving my car at 20 kph is 3 MJ/km, I can't then say "and if I cycled at 80 kph, I'd therefore only need 80 J/km". Not because the data doesn't support that, but because I can't cycle that fast.