Wilco (Wilco.Dijkstra.delete@this.ntlworld.com) on November 6, 2016 3:52 am wrote:
> juanrga (noemail.delete@this.juanrga.com) on November 4, 2016 5:08 pm wrote:
> > Wilco (Wilco.Dijkstra.delete@this.ntlworld.com) on November 4, 2016 1:27 pm wrote:
> >
> > > Are you aware the 2-wide 6-dispatch 7-issue Cortex-A73 has better IPC than the 3-wide 5-dispatch
> > > 8-issue Cortex-A72? Clearly there isn't a hard and fast rule about width vs IPC...
> > >
> >
> > I am well aware of the 'complex' expression that relates IPC
> > to width, depth, and other parameters. I repeat my words:
>
> It that was the case then you would understand why comparing the decode
> width of one CPU with the issue with of another is incorrect.
>

That is not what is being made. Check the three references given to understand why Haswell is 8-wide, Cyclone is 6-wide, and A15/A57 are 3-wide. Check the tables in Ref. 1 and 2. Once made, re-read my posts.