By: Ricardo B (ricardo.b.delete@this.xxxxx.xx), October 25, 2016 8:25 am
Room: Moderated Discussions
What is their approach to 32-bit operations?
Do they read/write 2 16 bit registers in parallel (twice the read ports) or in series (more latency, but who cares, it's a GPU).
From the "free conversion", I assume they have mixed instruction?
Eg, fadd r32 = r32 + r16 ?
Do they read/write 2 16 bit registers in parallel (twice the read ports) or in series (more latency, but who cares, it's a GPU).
From the "free conversion", I assume they have mixed instruction?
Eg, fadd r32 = r32 + r16 ?