By: David Kanter (dkanter.delete@this.realworldtech.com), January 25, 2017 8:15 am
Room: Moderated Discussions
Wilco (Wilco.Dijkstra.delete@this.ntlworld.com) on January 25, 2017 3:22 am wrote:
> David Kanter (dkanter.delete@this.realworldtech.com) on January 24, 2017 7:34 pm wrote:
> > Wilco (Wilco.Dijkstra.delete@this.ntlworld.com) on January 24, 2017 3:07 pm wrote:
> > > Anon (no.delete@this.email.com) on January 24, 2017 1:54 pm wrote:
> > > > Aaron Spink (aaronspink.delete@this.notearthlink.net) on January 24, 2017 6:44 am wrote:
> > > > > vvid (no.delete@this.hans.com) on January 24, 2017 1:55 am wrote:
> > > > > > Aaron Spink (aaronspink.delete@this.notearthlink.net) on January 23, 2017 7:02 pm wrote:
> > > > > > > dmcq (dmcq.delete@this.fano.co.uk) on January 22, 2017 1:03 pm wrote:
> > > > > > > > I'm not sure what "Problem with the phone/tablet SoCs is you are going to have to run at least
> > > > > > > > twice." means. Every ARM designed core has ECC support as an option as far as I'm aware, even
> > > > > > > > the A73 which is specifically for phones rather than mission critical or server applications.
> > > > > > > >
> > > > > > > That's great, what about the TB+ of main memory?
> > > > > > >
> > > > > >
> > > > > > Isn't it strange to ask of TB+ DRAM from smartphone SoC?
> > > > > > So far we have 8GB max here. Not that bad for a node.
> > > > > > Anyway CoreLink CMN-600 supports 8chn DDR4. So it should handle 1TB(?)
> > > > > >
> > > > > In the thread I'm replying to, we are talking about phone SoCs, the question about the TB+ of
> > > > > memory is related to main memory ECC for a super computer composed of phone/tablet socs.
> > > > >
> > > > > As far as X-Gene 3, that isn't a phone/tablet SoC. And it matters
> > > > > not what cores support, but what the processor/SoC supports.
> > > > >
> > > >
> > > > Why would anyone build a TB+ single memory image supercomputer from phone SOCs, other than as
> > > > a strawman? There would be so many other things wrong with it anyway... memory addressing would
> > > > almost be the least of your problems.
> > >
> > > Nobody would use the same SoC for both of course, that's insane. The original quote was:
> > > "And the huge market for phone/tablet ARM-based SoCs with low power and integrated GPU's
> > > means that a good deal of the relevant hardware design is already off-the-shelf ..."
> >
> > Which as we know is not true. Reusing a core barely helps. It's about volume
> > of the SoC. And server SoCs have little in common with phone chips.
>
> Wrong. Who says only the core can be shared? It's also about the caches, fabric, memory
> controllers, peripherals, dvfs, software etc. Reusing so many key components means you
> can share most of the design effort. The volume of a mobile SoC is more than enough to
> pay for the additional effort for the server version due to the significant reuse.
>
> > > That's correct given mobile SoCs contain many of the components needed for a server.
> >
> > Actually it's wrong.
>
> Really? Are you claiming that CPUs, fabrics, memory controllers etc etc cannot be shared?
Sure, they *can be* shared. But they *should not* be shared. Memory controllers are different, on-chip fabrics are different, power management is different, power delivery is different. The CPU core can be the same, but that involves sacrifices (smaller than ideal TLBs, smaller caches, lower power/core, etc.). The I/Os are radically different, since no phone has an off-chip cache coherent link in it. Some phones may have PCIe, none have 10GbE or 100GbE, or Infiniband.
> > >As stated several times
> > > mobile-focussed cores like Cortex-A73, their fabric, caches
> > > and memory controllers support ECC as well as a large
> > > address space. So you can use the same off-the-shelf components and build both mobile and server >parts.
> >
> > The A73 doesn't support AMBA5 and server fabric, etc. The A72 does.
>
> So? There are AMBA 4 equivalents too.
Yeah, and they are probably uniformly worse than the newer AMBA5 stuff. Unless you think that ARM didn't improve their system architecture between AMBA4 and 5 generation IPs...
David
> David Kanter (dkanter.delete@this.realworldtech.com) on January 24, 2017 7:34 pm wrote:
> > Wilco (Wilco.Dijkstra.delete@this.ntlworld.com) on January 24, 2017 3:07 pm wrote:
> > > Anon (no.delete@this.email.com) on January 24, 2017 1:54 pm wrote:
> > > > Aaron Spink (aaronspink.delete@this.notearthlink.net) on January 24, 2017 6:44 am wrote:
> > > > > vvid (no.delete@this.hans.com) on January 24, 2017 1:55 am wrote:
> > > > > > Aaron Spink (aaronspink.delete@this.notearthlink.net) on January 23, 2017 7:02 pm wrote:
> > > > > > > dmcq (dmcq.delete@this.fano.co.uk) on January 22, 2017 1:03 pm wrote:
> > > > > > > > I'm not sure what "Problem with the phone/tablet SoCs is you are going to have to run at least
> > > > > > > > twice." means. Every ARM designed core has ECC support as an option as far as I'm aware, even
> > > > > > > > the A73 which is specifically for phones rather than mission critical or server applications.
> > > > > > > >
> > > > > > > That's great, what about the TB+ of main memory?
> > > > > > >
> > > > > >
> > > > > > Isn't it strange to ask of TB+ DRAM from smartphone SoC?
> > > > > > So far we have 8GB max here. Not that bad for a node.
> > > > > > Anyway CoreLink CMN-600 supports 8chn DDR4. So it should handle 1TB(?)
> > > > > >
> > > > > In the thread I'm replying to, we are talking about phone SoCs, the question about the TB+ of
> > > > > memory is related to main memory ECC for a super computer composed of phone/tablet socs.
> > > > >
> > > > > As far as X-Gene 3, that isn't a phone/tablet SoC. And it matters
> > > > > not what cores support, but what the processor/SoC supports.
> > > > >
> > > >
> > > > Why would anyone build a TB+ single memory image supercomputer from phone SOCs, other than as
> > > > a strawman? There would be so many other things wrong with it anyway... memory addressing would
> > > > almost be the least of your problems.
> > >
> > > Nobody would use the same SoC for both of course, that's insane. The original quote was:
> > > "And the huge market for phone/tablet ARM-based SoCs with low power and integrated GPU's
> > > means that a good deal of the relevant hardware design is already off-the-shelf ..."
> >
> > Which as we know is not true. Reusing a core barely helps. It's about volume
> > of the SoC. And server SoCs have little in common with phone chips.
>
> Wrong. Who says only the core can be shared? It's also about the caches, fabric, memory
> controllers, peripherals, dvfs, software etc. Reusing so many key components means you
> can share most of the design effort. The volume of a mobile SoC is more than enough to
> pay for the additional effort for the server version due to the significant reuse.
>
> > > That's correct given mobile SoCs contain many of the components needed for a server.
> >
> > Actually it's wrong.
>
> Really? Are you claiming that CPUs, fabrics, memory controllers etc etc cannot be shared?
Sure, they *can be* shared. But they *should not* be shared. Memory controllers are different, on-chip fabrics are different, power management is different, power delivery is different. The CPU core can be the same, but that involves sacrifices (smaller than ideal TLBs, smaller caches, lower power/core, etc.). The I/Os are radically different, since no phone has an off-chip cache coherent link in it. Some phones may have PCIe, none have 10GbE or 100GbE, or Infiniband.
> > >As stated several times
> > > mobile-focussed cores like Cortex-A73, their fabric, caches
> > > and memory controllers support ECC as well as a large
> > > address space. So you can use the same off-the-shelf components and build both mobile and server >parts.
> >
> > The A73 doesn't support AMBA5 and server fabric, etc. The A72 does.
>
> So? There are AMBA 4 equivalents too.
Yeah, and they are probably uniformly worse than the newer AMBA5 stuff. Unless you think that ARM didn't improve their system architecture between AMBA4 and 5 generation IPs...
David