Wilco (Wilco.Dijkstra.delete@this.ntlworld.com) on October 21, 2017 7:16 am wrote:
> Adrian (a.delete@this.acm.org) on October 21, 2017 1:49 am wrote:
> > Maynard Handley (name99.delete@this.name99.org) on October 20, 2017 8:16 pm wrote:
>
> > The low performance for multi-precision operations is not surprising.
> >
> > While this version of Mathematica can probably be improved a lot, it cannot not reach parity
> > with x86, because this (support for multi-precision operations) is exactly the area were the
> > ARMv8 ISA is the most deficient compared with the x86 ISA (especially since Broadwell, but
> > also Intel since Nehalem & the AMD before Bulldozer were far above any competition).
>
> What essential instructions do you think are missing? It's trivial to do fast bignums on AArch64, so
> adding new instructions cannot give much gain, let alone 20x. Most likely the difference is due to using
> a badly written generic C implementation in one case and hand optimized assembly in the other.


No doubt hand tuned for different x64 implementations as they've changed instruction timings, added new instructions and support for wider SIMD instructions. x86 is where they make almost all their money these days, after all.

Not only would Wolfram need to write some ARMv8 assembly to close the gap, if they wanted to fully close it they'd need to write assembly specific to Apple's ARMv8 family. It is different enough in basic functionality like number of instructions issued/retired per cycle than ARM's standard cores (let alone other custom cores) a single version wouldn't be any more well optimized than trying to write x64 assembly to cover everything from AMD and Intel in the past decade.