Adrian (a.delete@this.acm.org) on October 21, 2017 1:49 am wrote:
> Maynard Handley (name99.delete@this.name99.org) on October 20, 2017 8:16 pm wrote:
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> > ...
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> Thanks for the interesting information.
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> The low performance for multi-precision operations is not surprising.
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> While this version of Mathematica can probably be improved a lot, it cannot not reach parity
> with x86, because this (support for multi-precision operations) is exactly the area were the
> ARMv8 ISA is the most deficient compared with the x86 ISA (especially since Broadwell, but
> also Intel since Nehalem & the AMD before Bulldozer were far above any competition).
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> Other deficiencies of the initial ARMv8 have already been addressed in the later extensions
> (e.g. atomic operations), but I have not heard anything about any plans for bignums.
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>

This MAY be true, but I don't think it's the real story. My guess is that details like that are, at ABSOLUTE WORST, a 2x or so factor.

The real issue, I think, is that Mathematica probably has a generic bignum codebase written in C, which is based on things like branching to track the overflows; AND an ISA specific codebase for x86 that can track the overflows via the special flags and handle appropriately (move them into integer registers for further arithmetic, and so on).
I see no reason this sort of thing couldn't also be done on ARMv8, but it does require writing a whole lot of assembly, so it's the sort of thing that I can understand them as leaving out for the first release.

Atomics are not relevant. This is not the place to discuss how Mathematica uses multiple cores, but, no, atomic issues are not what are making the bignums slow.