By: Travis (travis.downs.delete@this.gmail.com), December 20, 2017 6:37 pm
Room: Moderated Discussions
Jeff S. (fakity.delete@this.fake.com) on December 20, 2017 4:17 pm wrote:
> Micahel S (already5chosen.delete@this.yahoo.com) on December 20, 2017 2:53 pm wrote:
> > Bridges? Wells?
>
> What do you suspect might vary? Not a whole lot changed in the back ends of Intel cores from
> Sandy Bridge until now, and a fatter write buffer, etc., doesn't feel to me like a likely
> significant factor. And this should be wholly isolated from the un-core unless other threads
> were trying to peak into the main core's stack and cause line contention issues.
Well there were a lot of changes in Haswell: the sustained read/write bandwidth to L1 close to doubled since we got native 256-bit ops, and the L1L2 interface changed and was upgraded to 64-byte throughput (per Intel), and bank conflicts disapeared, a store port was added, etc. Most other generates (until SKL-X) have been mostly minor changes.
David's article here covers it in depth.
> Micahel S (already5chosen.delete@this.yahoo.com) on December 20, 2017 2:53 pm wrote:
> > Bridges? Wells?
>
> What do you suspect might vary? Not a whole lot changed in the back ends of Intel cores from
> Sandy Bridge until now, and a fatter write buffer, etc., doesn't feel to me like a likely
> significant factor. And this should be wholly isolated from the un-core unless other threads
> were trying to peak into the main core's stack and cause line contention issues.
Well there were a lot of changes in Haswell: the sustained read/write bandwidth to L1 close to doubled since we got native 256-bit ops, and the L1L2 interface changed and was upgraded to 64-byte throughput (per Intel), and bank conflicts disapeared, a store port was added, etc. Most other generates (until SKL-X) have been mostly minor changes.
David's article here covers it in depth.
