By: Adrian (a.delete@this.acm.org), February 28, 2019 12:16 am
Room: Moderated Discussions
Travis Downs (travis.downs.delete@this.gmail.com) on February 27, 2019 7:25 am wrote:
>
> It's hard to assume much about the microcode versions across different models: within a model the numbers at
> least seem to increase with newer microcodes, but between models the pattern doesn't hold, so it is entirely
> possible that 0x9a on CoffeeLake is at least as new as 0xc6 on Skylake. I haven't found a good list anywhere,
> or a way to see the date embedded in the microcode. At least from some PDFs released by Intel 0x9a is pretty
> new since the most recent version mentioned by Intel that I could find is 0x96 for most Coffee Lake chips.
The Skylake with microcode 0x8a is from an Intel NUC with Date of Manufacture = 2017-10-10.
The Cofee Lake with microcode 0x9a is from an Intel NUC with Date of Manufacture = 2018-12-19.
Coming directly from Intel, I believe that they should have really up-to-date microcodes for their dates of manufacture.
> You can reverse the behavior, showing the max value by setting W_MAX envvar to 1, like so:
>
>
>
> If you have the chance to run the CoffeeLake test again like this I would be very interested.
>
Running so the test on the Kaby Lake with microcode 0x58, resulted in a few more 18 cycle values, in neighbor positions to the 18 cycle positions from the first test.
This supports the supposition that the cause must include some randomness. Of course, randomness means that the times are also influenced by events which are not controlled during the test, e.g. events due to the activity of other threads which use the memory controller or the L3 cache.
It would be interesting to rerun the test on a really bare-metal computer, without operating system and other processes. I could do this, but right now I am very busy, so I might do it in a few weeks, when I would have time to make the required changes in it (i.e. transforming it into something like memtest86plus).
Running so the test 2 times on the Skylake with microcode 0x8a gave the same results as the initial test, i.e. no 18 cycle values.
I will post the results for Coffee Lake some time later today.
>
> It's hard to assume much about the microcode versions across different models: within a model the numbers at
> least seem to increase with newer microcodes, but between models the pattern doesn't hold, so it is entirely
> possible that 0x9a on CoffeeLake is at least as new as 0xc6 on Skylake. I haven't found a good list anywhere,
> or a way to see the date embedded in the microcode. At least from some PDFs released by Intel 0x9a is pretty
> new since the most recent version mentioned by Intel that I could find is 0x96 for most Coffee Lake chips.
The Skylake with microcode 0x8a is from an Intel NUC with Date of Manufacture = 2017-10-10.
The Cofee Lake with microcode 0x9a is from an Intel NUC with Date of Manufacture = 2018-12-19.
Coming directly from Intel, I believe that they should have really up-to-date microcodes for their dates of manufacture.
> You can reverse the behavior, showing the max value by setting W_MAX envvar to 1, like so:
>
>
W_MAX=1 ./offset-test.sh>
> If you have the chance to run the CoffeeLake test again like this I would be very interested.
>
Running so the test on the Kaby Lake with microcode 0x58, resulted in a few more 18 cycle values, in neighbor positions to the 18 cycle positions from the first test.
This supports the supposition that the cause must include some randomness. Of course, randomness means that the times are also influenced by events which are not controlled during the test, e.g. events due to the activity of other threads which use the memory controller or the L3 cache.
It would be interesting to rerun the test on a really bare-metal computer, without operating system and other processes. I could do this, but right now I am very busy, so I might do it in a few weeks, when I would have time to make the required changes in it (i.e. transforming it into something like memtest86plus).
Running so the test 2 times on the Skylake with microcode 0x8a gave the same results as the initial test, i.e. no 18 cycle values.
I will post the results for Coffee Lake some time later today.
