By: someone (someone.delete@this.somewhere.com), January 19, 2018 1:11 pm
Room: Moderated Discussions
Michael S (already5chosen.delete@this.yahoo.com) on January 18, 2018 12:47 pm wrote:
> someone (someone.delete@this.somewhere.com) on January 16, 2018 1:10 pm wrote:
> > David Kanter (dkanter.delete@this.realworldtech.com) on January 15, 2018 9:57 am wrote:
> > > Welcome to a new year everyone, I have a new article for your Monday morning reading!
> > >
> > > Intel’s 22FFL (FinFET Low-power) is a variant of their existing 22nm process that is aimed at low-cost,
> > > extremely low-power, and analog/RF applications. 22FFL relaxes the ground rules to reduce the need
> > > for double patterning, thereby cutting costs. At the same time, Intel’s engineers essentially backported
> > > the second and third generation FinFETs from the 10nm and 14nm processes to 22FFL, improving performance
> > > and power efficiency with superior fin geometry and workfunction metals. Intel also created a large
> > > library of digital and analog transistors and passive components.
> > >
> > > The full article is at https://www.realworldtech.com/intel-22ffl-process/.
> > >
> > > I'm really curious to see what Intel ends up manufacturing on 22FFL. It looks like a very nice process.
> > >
> > > David
> >
> > Page 3
> >
> > "SRAMs typically use low-leakage, high VT transistors, so Intel designed a new
> > set of three SRAM bit-cells for the 22FFL process. A high-density 0.87µm2 cell
> > and a high-current 0.107µm2 cell use the regular low-power transistors."
> >
> > I presume you mean 0.087 um2 high density cell.
> >
> > "Like the analog transistors, I/O transistors are also larger footprint, with
> > 216nm and 270nm contacted gate pitches. However, they use a thick gate oxide
> > to support stable 1.2V, 1.5V, and 1.8V operation for off-chip interfaces."
> >
> > LOL, "thick oxide device" supports up to 1.8 V. Different world than mine. :-)
>
> Startix-5 is TSMC 28nm. I don't know which variation. Supports 3.0V, but have troubles with 3.3V
> Arria-10 is TSMC 20nm. Majority of SKUs do not support I/O above 1.8V.
> Stratix-10 is Intel 14nm. I didn't look at it yet.
>
Want to have your mind blown?
You can make and sell ICs with 0.6 um or greater minimum feature size, operate
with *many* hundreds of volts on select I/O pins and still enjoy over 50% GM and
very loyal socket wins. You don't even need your own fabs (although having your
own process technologies does help ;-)
> someone (someone.delete@this.somewhere.com) on January 16, 2018 1:10 pm wrote:
> > David Kanter (dkanter.delete@this.realworldtech.com) on January 15, 2018 9:57 am wrote:
> > > Welcome to a new year everyone, I have a new article for your Monday morning reading!
> > >
> > > Intel’s 22FFL (FinFET Low-power) is a variant of their existing 22nm process that is aimed at low-cost,
> > > extremely low-power, and analog/RF applications. 22FFL relaxes the ground rules to reduce the need
> > > for double patterning, thereby cutting costs. At the same time, Intel’s engineers essentially backported
> > > the second and third generation FinFETs from the 10nm and 14nm processes to 22FFL, improving performance
> > > and power efficiency with superior fin geometry and workfunction metals. Intel also created a large
> > > library of digital and analog transistors and passive components.
> > >
> > > The full article is at https://www.realworldtech.com/intel-22ffl-process/.
> > >
> > > I'm really curious to see what Intel ends up manufacturing on 22FFL. It looks like a very nice process.
> > >
> > > David
> >
> > Page 3
> >
> > "SRAMs typically use low-leakage, high VT transistors, so Intel designed a new
> > set of three SRAM bit-cells for the 22FFL process. A high-density 0.87µm2 cell
> > and a high-current 0.107µm2 cell use the regular low-power transistors."
> >
> > I presume you mean 0.087 um2 high density cell.
> >
> > "Like the analog transistors, I/O transistors are also larger footprint, with
> > 216nm and 270nm contacted gate pitches. However, they use a thick gate oxide
> > to support stable 1.2V, 1.5V, and 1.8V operation for off-chip interfaces."
> >
> > LOL, "thick oxide device" supports up to 1.8 V. Different world than mine. :-)
>
> Startix-5 is TSMC 28nm. I don't know which variation. Supports 3.0V, but have troubles with 3.3V
> Arria-10 is TSMC 20nm. Majority of SKUs do not support I/O above 1.8V.
> Stratix-10 is Intel 14nm. I didn't look at it yet.
>
Want to have your mind blown?
You can make and sell ICs with 0.6 um or greater minimum feature size, operate
with *many* hundreds of volts on select I/O pins and still enjoy over 50% GM and
very loyal socket wins. You don't even need your own fabs (although having your
own process technologies does help ;-)
