New article: Intel's 22FFL process

Article: Intel's 22FFL Process Improves Power, Cost, and Analog
By: tarlinian (tarlinian.delete@this.gmail.com), January 20, 2018 10:39 am
Room: Moderated Discussions
C. Ladisch (clemens.delete@this.ladisch.de) on January 20, 2018 3:17 am wrote:
> I wrote:
> > Texas Instruments talks about 5 V logic in :
> > "The electronic structure at the atomic scale of ultrathin gate oxides"
>
> links:
> http://www.ti.com/lit/pdf/scla013
> https://www3.nd.edu/~gtimp/images/Nature.pdf

All modern logic processes use a few nm HfO2 (a material with significantly higher k value than SiO2 or SiO2 that has undergone nitridation) for the majority of the physical thickness of the gate dielectric. However, the gate dielectric stack still requires a very thin interface layer (sub-nm) of SiO2 in order to avoid excessive electronic trap density in the channel. (This interface layer actually ends up being a significant contributor to EOT, which is why gate oxide scaling has ended.) "Thick Oxide" transistors are typically made by significantly thickening this interface layer. The entire fin on a finFET has approximately the same thickness as the gate oxide described in your quote, so creating a gate oxide that thick is rather impractical.
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    New article: Intel's 22FFL processC. Ladisch2018/01/20 04:16 AM
      New article: Intel's 22FFL processC. Ladisch2018/01/20 04:17 AM
        New article: Intel's 22FFL processtarlinian2018/01/20 10:39 AM
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