hobold (hobold.delete@this.vectorizer.org) on August 31, 2018 1:50 am wrote:
> Adrian (a.delete@this.acm.org) on August 30, 2018 11:37 am wrote:
> > Konrad Schwarz (no.spam.delete@this.no.spam) on August 30, 2018 6:37 am wrote:
> > > Maynard Handley (name99.delete@this.name99.org) on August 18, 2018 4:22 pm wrote:
> > > > - you offer an atomic remote zero (or remote fill) instruction that is given a line address
> > > > plus count. The first thing it does is flush the line from all other caches, then it marks
> > > > the set of lines locally as in some sort of intermediate state, then, fast as possible, it
> > > > starts zeroing each line and, once zeroed, it goes back to a standard "valid" state.
> > >
> > > Power(PC) Data Cache Block Allocate (dcba) and Data Cache Block
> > > Zero (dcbz) instructions do this, albeit on a single cache line.
> >
> >
> > Now also AMD Zen has introduced CLZERO (i.e. the equivalent of dcbz).
> >
>
> For Apple, dcbz turned into a liability when they moved to 64 bits. It wasn't the 64 bit ISA that
> was at fault, but the cache line size of the 64 bit capable CPU model(s) differed. All prior 32
> bit PPC processors had used 32 byte sized cache blocks, but the new one used 128 bytes.
>
> The dcbz instruction was architected to clear a cache block at whatever native size the machine
> had, but programmers everywhere simply assumed the instruction to clear 32 bytes.
>
> Thus the new 64 bit machine re-defined the instruction to mean "clear 32 bytes",
> and it was rather slow and inefficient. Additionally, a new instruction dcbzl
> was introduced to _really_ mean "clear a cache line of native size".
>
> I guess a future extension would have had to redefine the meaning of dcbzl to "clear 128 bytes".
>
>
> Lesson learned: to safely deploy a user-land instruction which manipulates a cache block, you have
> to pair it with a user-land instruction to obtain the current actual block size. And you have to
> have varying hardware models concurrently out in the field widely available for testing.
>
> Otherwise programmers will use the instruction not for what
> you intended it to do, but for whatever they want.
>
> Chances are that CLZERO will trigger another wave of painful learning.

Or have an instruction where you give the start and limit and it increments the start address if it doesn't do the whole range. Or something like one of the x86 string instructions.