Maynard Handley (name99.delete@this.name99.org) on August 24, 2018 12:03 pm wrote:
> Is there a real (and realistic) fear that these instructions can generate so much heat so fast
> that the existing thermal tracking is too slow? And something that could be fast enough (eg
> as has been suggested, limiting instruction throughput at some point --- maybe issue, maybe
> decode) is not realistic why? Because the entire thermal modeling system runs at say 100th
> CPU frequency and it was too hard at the time to bolt on a new, better targeted, system?

I have heard more concern around the input voltage sagging on sudden heavy draw more than heat accumulation, so maybe the thermal capacity of the die is larger in a sense than the electrical capacitance afforded by the on-die and on-package systems. It seems like the 512b FMA units can collectively suck down more than half a core's power budget by themselves, and it might not take very many cycles of suddenly doubled (or worse) power consumption to drain instantaneous power supply below the threshold of reliable operation.

This is the kind of thing I suspect David would very succinctly summarize as "dI/dt concerns", but I don't have any real data or secret sources for you unfortunately.