By: Maynard Handley (name99.delete@this.name99.org), August 27, 2018 9:37 am
Room: Moderated Discussions
none (none.delete@this.none.com) on August 26, 2018 9:40 pm wrote:
> Maynard Handley (name99.delete@this.name99.org) on August 26, 2018 5:28 pm wrote:
> [...]
> > What is the official ARM stance regarding NEON vs SVE? In particular are they independent register
> > files, or is there some sort of rule that NEON always forms the lowest bits of the SVE registers?
> > (That would be a strange rule, but it would fit how NEON overlaps
> > scalar FP, and is how ARM has done things in the past.)
>
> The lower 128-bit of SVE registers indeed are SIMD registers.
Thanks for the info. To ME (maybe others disagree) that suggests that ARM has in mind SVE as a generic facility, something expected on all decent ARM CPUs at some point (albeit perhaps as limited as 128 bits wide), and built on top of the existing NEON HW. ie it's less of a fully isolated bolt-on feature with its own complete world of execution hardware and registers.
> Maynard Handley (name99.delete@this.name99.org) on August 26, 2018 5:28 pm wrote:
> [...]
> > What is the official ARM stance regarding NEON vs SVE? In particular are they independent register
> > files, or is there some sort of rule that NEON always forms the lowest bits of the SVE registers?
> > (That would be a strange rule, but it would fit how NEON overlaps
> > scalar FP, and is how ARM has done things in the past.)
>
> The lower 128-bit of SVE registers indeed are SIMD registers.
Thanks for the info. To ME (maybe others disagree) that suggests that ARM has in mind SVE as a generic facility, something expected on all decent ARM CPUs at some point (albeit perhaps as limited as 128 bits wide), and built on top of the existing NEON HW. ie it's less of a fully isolated bolt-on feature with its own complete world of execution hardware and registers.