By: none (none.delete@this.none.com), August 27, 2018 10:28 am
Room: Moderated Discussions
Maynard Handley (name99.delete@this.name99.org) on August 27, 2018 10:37 am wrote:
>[...]
> To ME (maybe others disagree) that suggests that ARM has in mind SVE as
> a generic facility, something expected on all decent ARM CPUs at some point (albeit perhaps
> as limited as 128 bits wide), and built on top of the existing NEON HW. ie it's less of a fully
> isolated bolt-on feature with its own complete world of execution hardware and registers.
I agree. When you already have a 128-bit NEON unit along with its register file, adding
support for 128-bit SVE would require minimal supplemental hardware. That'd be the best
way to speed up adoption even if the benefit from a performance point of view would likely
be 0.
I can't say if that will happen, but at least the architecture allows cheap implementations :)
>[...]
> To ME (maybe others disagree) that suggests that ARM has in mind SVE as
> a generic facility, something expected on all decent ARM CPUs at some point (albeit perhaps
> as limited as 128 bits wide), and built on top of the existing NEON HW. ie it's less of a fully
> isolated bolt-on feature with its own complete world of execution hardware and registers.
I agree. When you already have a 128-bit NEON unit along with its register file, adding
support for 128-bit SVE would require minimal supplemental hardware. That'd be the best
way to speed up adoption even if the benefit from a performance point of view would likely
be 0.
I can't say if that will happen, but at least the architecture allows cheap implementations :)