TTM

By: Daniel B (fejenagy.delete@this.gmail.com), November 6, 2018 2:21 pm
Room: Moderated Discussions
dmcq (dmcq.delete@this.fano.co.uk) on November 6, 2018 2:45 am wrote:
> Anandtech outlined a new Intel multi-chip packkage
> Intel Goes For 48-Cores: Cascade-AP with Multi-Chip Package Coming Soon
> but says they're not using EMIB, do you think perhaps Anandtech are wrong or why would
> they not use EMIB? It seems made for the job and a unique advantage for Intel.

It hasn't even occurred to me EMIB was an option given that this is classic 2005/2006 all over again, tactical response as opposed to a strategic plan years in advance. Intel is probably capable of bringing such a MCP product to market in 9-12 months from notice. Redesigning Cascade Lake silicon for a new IO interface would have clearly taken more than that. I'm not sure mechanical and thermal considerations were key, EMIB makes dies sit apart the same way.
< Previous Post in Thread 
TopicPosted ByDate
Why no EMIB?dmcq2018/11/06 03:45 AM
  Why no EMIB?anon2018/11/06 04:31 AM
    Why no EMIB?anon.12018/11/06 08:15 AM
      Why no EMIB?Kevin G2018/11/06 09:06 AM
        Why no EMIB?useruser2018/11/06 10:41 AM
        Why no EMIB?anon.12018/11/07 08:00 AM
          Why no EMIB?Jeff S.2018/11/07 09:45 AM
      Why no EMIB?David Hess2018/11/09 09:43 PM
        Why no EMIB?dmcq2018/11/10 07:35 AM
          Why no EMIB?Maynard Handley2018/11/10 09:27 AM
          Why no EMIB?David Hess2018/11/10 09:37 AM
  TTMDaniel B2018/11/06 02:21 PM
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