Sunny Cove wide

By: anon (spam.delete.delete.delete@this.this.this.spam.com), December 13, 2018 2:01 pm
Room: Moderated Discussions
Travis Downs (travis.downs.delete@this.gmail.com) on December 13, 2018 11:23 am wrote:
> Maynard Handley (name99.delete@this.name99.org) on December 13, 2018 10:25 am wrote:
> >
> > What is not being aggressively pushed (as far as I know) is the sort
> > of fusion that rewrites an intermediate register, something like
> > rA= rB op1 RC
> > rA= rD op2 rA going to
> > rA= rD op2 (rB op1 rC)
> > The point of this exercise is that you only have to perform the rA allocation
> > once, so when it happens you get more throughout through your renamer.
>
> Indeed, that's the type of possible fusion that I'm aware of that wouldn't be crazy to implement.
> Other things like fusion of non-continguous instructions raise all sorts of other problems such
> as how interrupts see the world, how faults in the intervening instructions work, etc.
>
> On scalar x86, with 2-operand rather than 3-operand ops, you also have a lot of this:
>
>
> mov r1, r2
> op r1, r3
>

>
> That is, a move to a register followed immediately by an operation
> overwriting that register. This could potentially be fused to:
>
>
> op r1, r2, r3
>

>
> Since we know there is internal support for 3-operand uops (and indeed there
> are some 3-operand scalar instructions, such as lea and andn).
>

This seems like it would be a nightmare to implement.
The usual way would be that mov-elimination removes the mov and the uop that leaves the renamer is effectively "op RAT[r1], RAT[r2], RAT[r3]" anyway. I hope you understand what I mean with that notation.

Macro fusion usually works with flags where only the type of operations matters. Implicit operands like flags and with push/pop are dealt with in the frontend iirc so all the information is available.
Fusing mov and a different op would require the input and output registers of the second op to be compared with the output register of the mov and then if the output register matches the matching input register would have to be overwritten with the input register from the mov.

Then there's also the problem of actually getting that code. Compilers are too smart, if they expect the rename width to be a problem the might try to move the mov elsewhere. If the target architecture does not support mov-elimination then the mov would probably be hoisted to avoid stalling the subsequent instruction or you'd get something like
mov r1, r2
op r2, r3
instead.

The appeal of fusing flag-dependant operations is just far greater on x86 because all operations that can affect flags always do, so consumer and producer are virtually guaranteed to be consecutive instructions.

> >
> > This may not be THAT valuable for x86 if it's still limited in front-end (but µop cache is supposed
> > to help with that much of the time?); and I think it becomes more valuable as ARM decode width grows
> > crazy high (now 7 on Apple).
>
> Being front-end limited doesn't stop this from being useful - it fact it may make it more useful
> since the fusion happens early enough in the front end (at decode) that the instruction may
> already be used be fused when it hits the bottleneck. For example, on Intel designs that can
> decode only 4 instructions, it can actually decode 5 if one is macro fused, so fusion helps
> decode throughput (although there are complications, like the decoder has to see both instructions
> in the same cycle). The op is fused in the uop cache too, so it helps there.
>
> In any case, I don't consider recent Intel front-end limited in the usual sense: the front-end width
> is 5 (legacy) decoder or 6 (uop cache) versus a rename limit of 4, so rename will usually be the narrower
> bottleneck for tight compute-bound loops. If you go back a few generations it was different.
>
> Of course, in the real world all sorts of code can be front-end limited just because the working set is large
> enough that you get all sorts of L1I misses and L2 misses - but that would apply to mostly any uarch.
>

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TopicPosted ByDate
Sunny Cove wideSeni2018/12/12 02:58 PM
  Sunny Cove wideTravis Downs2018/12/12 09:25 PM
    Sunny Cove wideJeff S.2018/12/12 10:26 PM
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                      What is "u-tagged"?Travis Downs2018/12/15 09:52 AM
                        What is "u-tagged"?anon2018/12/16 08:26 AM
                          What is "u-tagged"?Anon2018/12/18 04:25 AM
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        Sunny Cove wideSeni2018/12/13 04:20 PM
          Fair enough! (NT)Travis Downs2018/12/13 04:43 PM
  Sunny Cove wide-.-2018/12/13 04:37 AM
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      Sunny Cove wideTravis Downs2018/12/13 09:39 AM
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            Sunny Cove wideTravis Downs2018/12/16 07:53 PM
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