Sunny Cove wide

By: Travis Downs (, December 13, 2018 1:22 pm
Room: Moderated Discussions
anon ( on December 13, 2018 1:01 pm wrote:
> Travis Downs ( on December 13, 2018 11:23 am wrote:
> > Maynard Handley ( on December 13, 2018 10:25 am wrote:
> > >
> > > What is not being aggressively pushed (as far as I know) is the sort
> > > of fusion that rewrites an intermediate register, something like
> > > rA= rB op1 RC
> > > rA= rD op2 rA going to
> > > rA= rD op2 (rB op1 rC)
> > > The point of this exercise is that you only have to perform the rA allocation
> > > once, so when it happens you get more throughout through your renamer.
> >
> > Indeed, that's the type of possible fusion that I'm aware of that wouldn't be crazy to implement.
> > Other things like fusion of non-continguous instructions raise all sorts of other problems such
> > as how interrupts see the world, how faults in the intervening instructions work, etc.
> >
> > On scalar x86, with 2-operand rather than 3-operand ops, you also have a lot of this:
> >
> >
> > mov r1, r2
> > op r1, r3
> >

> >
> > That is, a move to a register followed immediately by an operation
> > overwriting that register. This could potentially be fused to:
> >
> >
> > op r1, r2, r3
> >

> >
> > Since we know there is internal support for 3-operand uops (and indeed there
> > are some 3-operand scalar instructions, such as lea and andn).
> >
> This seems like it would be a nightmare to implement.
> The usual way would be that mov-elimination removes the mov and the uop that leaves the renamer is effectively
> "op RAT[r1], RAT[r2], RAT[r3]" anyway. I hope you understand what I mean with that notation.

Yes, but the problem is the eliminated mov still takes RAT bandwidth, which is often a critical bottleneck since almost everything else is wider. Agreed though that mov-elimination makes this type of fusion less important than it might otherwise be.

> Macro fusion usually works with flags where only the type of operations matters. Implicit operands like
> flags and with push/pop are dealt with in the frontend iirc so all the information is available.

Flags have to be are renamed as well, and I think they are simply associated with the destination register of the instruction that produced them. E.g, you can think of every physical register as extended with flag values which are populated by the same op that wrote the register.

In any case, I don't think any of that matters for macro-fusion: for existing fusion the decoders just have to match the simple pattern of compatible ALU op followed by compatible jump and emit the fused op. So it's a very simple pattern matching. The flags don't really come into it.

> Fusing mov and a different op would require the input and output registers of the second op to
> be compared with the output register of the mov and then if the output register matches the matching
> input register would have to be overwritten with the input register from the mov.

Yes, the comparison needs to compare the (static) registers in the instructions, but this seems not at all difficult and then it just needs to emit the fused op. I'm not sure what you mean by "overwrite" - if the the two instructions match the pattern the fused op is just emitted whole-cloth.

I am assuming this all happens at decode. Are you thinking it happens at rename?

> Then there's also the problem of actually getting that code. Compilers are too smart, if
> they expect the rename width to be a problem the might try to move the mov elsewhere.

Here, I strongly disagree. First, I have never seen compilers determine there is "rename width" problems and do something proactive to fix it. Almost everything is a "feed-forward" (not feed-back) and based on heuristics. I think compilers are working a couple of levels less smartly than that.

Second, you can't really fix "rename width" by moving code around. What matters is loops, and in loops rename bandwidth is basically a global property of the loop, not of a few instructions. The loop either hits the rename bandwidth or not, and re-arrangement can't fix it. At least it mostly works like that on deep OoO machines for loops that aren't giant (if they are giant, like larger than the OoO window, maybe this type of movement can help if you can move a large distance).

> If
> the target architecture does not support mov-elimination then the mov would probably be
> hoisted to avoid stalling the subsequent instruction or you'd get something like
> mov r1, r2
> op r2, r3
> instead.

This is true: compilers will already prefer the above form when possible. So it would be something they would need to learn/tune for. It was no different that existing macro-fusion: when it was introduced compilers almost always separated the flag-producing op and the jump if they could, but now they put them adjacent as long as you tune for newer CPUs.

> The appeal of fusing flag-dependant operations is just far greater on x86 because all operations that can
> affect flags always do, so consumer and producer are virtually guaranteed to be consecutive instructions.

Yup, but it's already done! As above though, compilers often managed to separate the set and the jump - just trying compiling any code on gcc without -march or -mtune set: there is almost always a load, lea or store the compiler can shove in between. They had to learn to play nice with macro-fusion.

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TopicPosted ByDate
Sunny Cove wideSeni2018/12/12 01:58 PM
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                      What is "u-tagged"?Travis Downs2018/12/15 08:52 AM
                        What is "u-tagged"?anon2018/12/16 07:26 AM
                          What is "u-tagged"?Anon2018/12/18 03:25 AM
    Sunny Cove wideSeni2018/12/13 02:33 AM
      Sunny Cove wideKevin G2018/12/13 07:37 AM
        Sunny Cove wideTravis Downs2018/12/13 08:17 AM
          Sunny Cove wideKevin G2018/12/17 09:09 AM
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        Sunny Cove wideMaynard Handley2018/12/13 10:25 AM
          Sunny Cove wideTravis Downs2018/12/13 11:23 AM
            Sunny Cove wideanon2018/12/13 01:01 PM
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                                      Sunny Cove wideTravis Downs2018/12/16 10:15 AM
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                                        how many anons here? (NT)Michael S2018/12/17 01:46 AM
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                        Sunny Cove wideanon2018/12/15 09:55 AM
                          Sunny Cove wideTravis Downs2018/12/16 08:19 AM
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                              Sunny Cove wideTravis Downs2018/12/16 09:57 AM
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                          Sunny Cove wideTravis Downs2018/12/16 10:32 AM
        Sunny Cove wideSeni2018/12/13 03:20 PM
          Fair enough! (NT)Travis Downs2018/12/13 03:43 PM
  Sunny Cove wide-.-2018/12/13 03:37 AM
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      Sunny Cove wideTravis Downs2018/12/13 08:39 AM
        Sunny Cove wideanon2018/12/13 11:09 AM
          Sunny Cove wideTravis Downs2018/12/13 11:27 AM
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      Sunny Cove wideanonymous22018/12/13 02:20 PM
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          Sunny Cove wideanon³2018/12/13 09:34 PM
            Sunny Cove wideTravis Downs2018/12/16 06:53 PM
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