What is "u-tagged"?

By: anon (spam.delete.delete.delete@this.this.this.spam.com), December 15, 2018 5:37 am
Room: Moderated Discussions
Jeff S. (fakity.delete@this.fake.com) on December 14, 2018 9:23 pm wrote:
> anon (anon.delete@this.yumous.com) on December 14, 2018 7:51 pm wrote:
> > What happens if you get several utag matches from the same set? Do you serialize the actual tag check?
>
> Lines with the same utags cannot reside in L1 at the same time. On a load of a colliding
> line, the previous line is evicted but left available in L2 (assuming strict inclusivity
> of L1 by L2). You can therefore use hash collisions to construct things like degenerate
> tight pointer chase cycles with a ~3x worse throughput than what you might expect.
>
> > Also, increasing the number of ways by 50% will increase the number of collisions unless the
> > utag size grows. Now I suck at math as well (no offense :P) so I am not able to quantify it.
>
> It is so-called Birthday Problem math, at least if you assume uniform flat distributions from
> a good hash function and not intentionally positioning data to avoid or create collisions.
>
> > I also do not see any reason why Intel would not have been playing the utag trick with
> > 8-ways, so I doubt this is what enabled moving to 12-ways (Assuming they are not going
> > 96-sets 8-way VIVT). Maybe it is a 64-set/8-ways decoupled sectored cache :D
>
> Intel definitely has not used utags historically. You don't even need to hunt for hash collisions
> to verify, you just need to mmap() the same page twice and read two virtual views of the same
> data therein in alternation and see that you aren't getting >10 cycle read latencies.

Possibly because of the cache hierarchy. Inclusive L3, non-inclusive L2 doesn't handle the collisions elegantly, inclusive L2 does. So if the desktop/client architecture gets a 512 kiB inclusive L2 like the rumours suggest the problem disappears.
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Sunny Cove wideSeni2018/12/12 02:58 PM
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