eDRAM too expensive

By: Adrian (a.delete@this.acm.org), January 13, 2019 8:51 pm
Room: Moderated Discussions
David Kanter (dkanter.delete@this.realworldtech.com) on January 13, 2019 2:34 pm wrote:
> anon³ (alt-0179.delete@this.test.example.test) on January 13, 2019 1:17 pm wrote:
> >
> > That implies the target is actually GF/IBM's 14HP. And that lines up perfectly, since by all accounts
> > 14HP is an excellent choice for IO-heavy designs. It also implies that there could be eDRAM on the IO
> > die, but that seems unlikely given the target die size and yields. Perhaps they've

> eDRAM is incredibly expensive and SRAM is better for small
> arrays. I wouldn't worry too much about what they call it.
> Honestly, 12nm is mostly just 14nm with different libraries (for density) and transistor/contact
> optimization. I/O doesn't need logic libraries, ergo its 14nm.
> David

Actually I have already speculated some time ago in another thread that the so called "14 nm" is not the initial Zen process, but the IBM 14HP.

Until now there has been no new information contradicting this supposition.

Arguments that support this:

1. Both the new Ryzen & Epyc I/O dies include PCIE 4.0 and for the IBM process proven PCIE 4.0 interfaces already existed and licensing them would have saved a lot of costs & risks for AMD.

2. The new I/O dies also need higher speed SERDES for the other interfaces, e.g. for the inter-chip links, probably up to at least 20 Gb/s, more likely up to 25 Gb/s.

Such SERDES designs were already existing and proven for the IBM process, while the original Zen 14 nm process seemed to not be able to reach serial speeds much above 10 Gb/s.

The ease of implementation of very high speed serial interfaces seems to be the most important advantage of the IBM process, because the IBM processor cores have similar performances with those designed by AMD in the Samsung-licensed process, so the more expensive IBM process does not seem to have any advantages for cores. On the other hand, for high-speed I/O, the IBM process is much better.

If the process for the AMD I/O dies is not the IBM 14HP, then it must be an improved version of the GF 14 nm, allowing at least double serial speeds comparing to the old one.

Instead of GF having improved a lot their Samsung 14 nm process, using the existing IBM process seems much more likely.

If the IBM process is used, that would also be good for IBM, because making more wafers using the same process should lead to better yields and lower costs for both companies.

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              eDRAM too expensiveAdrian2019/01/13 08:51 PM
                eDRAM too expensiveAdrian2019/01/13 09:01 PM
                eDRAM too expensiveRicardo B2019/01/14 11:06 AM
                  Zen PHY speedsJeff S.2019/01/14 11:40 AM
                  eDRAM too expensiveAdrian2019/01/14 12:44 PM
                    Zen target process (was: eDRAM too expensive)hobold2019/01/14 02:42 PM
                      Zen target process (was: eDRAM too expensive)Adrian2019/01/14 09:13 PM
                        Zen target process (was: eDRAM too expensive)hobold2019/01/15 08:28 PM
                    eDRAM too expensiveRicardo B2019/01/15 03:40 AM
                    eDRAM too expensiveRicardo B2019/01/15 08:26 AM
              eDRAM too expensiveMaynard Handley2019/01/14 10:38 AM
                eDRAM too expensiveanon2019/01/14 01:00 PM
                  eDRAM too expensiveMaynard Handley2019/01/14 01:43 PM
                    eDRAM too expensiveDan Fay2019/01/14 02:16 PM
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                        eDRAM too expensiveDan Fay2019/01/14 04:58 PM
                    eDRAM too expensivesomeone2019/01/15 08:20 AM
                eDRAM too expensiveanon2019/01/14 03:34 PM
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                      AMD CPU die size & functionalityJan Olšan2019/01/16 07:11 AM
                  AMD IO die size & functionalityMaynard Handley2019/01/16 09:17 AM
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