AMD IO die

By: juanrga (, January 14, 2019 4:04 am
Room: Moderated Discussions
anon³ (alt-0179.delete@this.test.example.test) on January 13, 2019 1:17 pm wrote:
> JS ( on January 12, 2019 1:05 am wrote:
> > > We could wait a little about power consumption.
> > > The node shift is unable to halve the power consumption
> > > on an high power cpu, moreover half the SKU is on 14nm.
> > > More likely AMD demoed on a very light development motherboard unable of overclock. My bet
> > > Intel was on a power hungry plataform thinked to allow more than 300W under overclocking.
> > >
> > > Better wait real products.
> > > For now is only smart marketing.
> >
> > Correct me if I'm wrong but the IO die on 14nm shouldn't be a significant limiting factor
> > for the chip. It's relative simplicity to the processor die should make it clock relatively
> > well, or at least parallel silicon could be added to make up for any deficit?
> IO die on GF/IBM 14nm is going to be just fine. IO structures scale abysmally with
> process (it's all about gate oxides and voltage rating), so once you've paid the
> costs to go off-die, it doesn't matter much what process the IO die is on.
> It's interesting that the IO die is claimed to be "14nm", though, not "12nm". Zen+
> is 12nm, so there's no reason the IO die wouldn't also be on 12nm. At least, that's
> if the target process was GF 14LP/12LP (which are almost the same process).

GF 12nm is a marketing rebrand of 14nm+. It hit clocks aren't needed for the IO die, so AMD is back to the original (and cheaper) 14nm.

> That implies the target is actually GF/IBM's 14HP. And that lines up perfectly, since by all accounts
> 14HP is an excellent choice for IO-heavy designs. It also implies that there could be eDRAM on the IO
> die, but that seems unlikely given the target die size and yields. Perhaps they've managed some clever
> use of a small amount of eDRAM somewhere (it does seem the sort of thing that would be useful on an
> all-IO die), or perhaps they've got a custom eDRAM-less process variant to save a bit of cost.

14HP targets clocks aren't needed for the IO die, not to mention it is an expensive node. If you are going to pay for 14HP, then you can use 7nm.

And there is no eDRAM. As proven before, there is no enough space in the IO die for a meaningful L4. Also Sandra database and codenames of engineering/qualification samples prove there is only up to L3 from client to server.
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                eDRAM too expensiveanon2019/01/14 02:00 PM
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                        eDRAM too expensiveDan Fay2019/01/14 05:58 PM
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            AMD IO diejuanrga2019/01/14 04:04 AM
              AMD IO dieMaynard Handley2019/01/14 11:42 AM
                AMD IO dieAlberto2019/01/14 03:00 PM
                AMD IO diejuanrga2019/01/15 03:54 AM
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                      AMD CPU die size & functionalityanon2019/01/16 02:32 AM
                        AMD CPU die size & functionalityAlberto2019/01/16 06:40 AM
                      AMD CPU die size & functionalityJan Olšan2019/01/16 08:11 AM
                  AMD IO die size & functionalityMaynard Handley2019/01/16 10:17 AM
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