eDRAM too expensive

By: Maynard Handley (name99.delete@this.name99.org), January 14, 2019 5:34 pm
Room: Moderated Discussions
anon (anon.delete@this.anonb.com) on January 14, 2019 3:34 pm wrote:
> Maynard Handley (name99.delete@this.name99.org) on January 14, 2019 10:38 am wrote:
> >
> > A third possibility is that yield is substantially lower. This is certainly possible in principle,
> > but if course normal DRAMs get made in huge volumes. Of course normal DRAMs happen in a specialized
> > fab... So if I had to guess (and if the statement is true) this is where my money would be.
>
> Note that IBM eDRAM is physically a very different device from normal DRAM. In normal DRAM, the capacitor
> is built above the silicon substrate. In IBM eDRAM, the capacitors are dug deep into the substrate.
>
> The reason for this is that having the capacitor arrays above the transistors means that you need to have very
> long vias connecting the surface of the chip to the transistors. Since the caps also need to be close to the
> transistors, this limits your metal stack to just a few useful layers close to the transistors, and then the
> rest very far away. This is sort of completely incompatible with any sort of properly high-speed logic.
>
> In comparison, the IBM eDRAM is basically non-intrusive to a normal logic chip -- you can build
> all the things you could otherwise, and just dig holes for eDRAM where you want them. The cost
> is that yield is terrible compared to normal DRAM, and you need special processing steps.

Thanks, that's the sort of answer I was hoping for.
Now, do we have a number for "yields are terrible", because I suspect this is subject to the same sort of grossly unhelpful language that I earlier discussed.

I think it's probably fair to peg DRAM yields at, to first approximation, 100%. (95% = 100% for these purposes). And let's assume the rest of the IO die is, good enough, also 100% yield.

Now, is "terrible" yield, in this context, say 85% (ie bad yields means essentially all of the extra 20% or so cost is from the extra ~20% or so of bad dies that you have to fab)? Or is terrible yield what most people would actually consider terrible, so maybe anything from 50% down to 20% or even less?
These sorts of yields are not just my exaggeration. In leading edge optical work, for example, some of the things you fab you would be THRILLED if you could consistently hit 20% yield. You have to give numbers, because extreme statements without context mean nothing.
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              eDRAM too expensiveAdrian2019/01/13 08:51 PM
                eDRAM too expensiveAdrian2019/01/13 09:01 PM
                eDRAM too expensiveRicardo B2019/01/14 11:06 AM
                  Zen PHY speedsJeff S.2019/01/14 11:40 AM
                  eDRAM too expensiveAdrian2019/01/14 12:44 PM
                    Zen target process (was: eDRAM too expensive)hobold2019/01/14 02:42 PM
                      Zen target process (was: eDRAM too expensive)Adrian2019/01/14 09:13 PM
                        Zen target process (was: eDRAM too expensive)hobold2019/01/15 08:28 PM
                    eDRAM too expensiveRicardo B2019/01/15 03:40 AM
                    eDRAM too expensiveRicardo B2019/01/15 08:26 AM
              eDRAM too expensiveMaynard Handley2019/01/14 10:38 AM
                eDRAM too expensiveanon2019/01/14 01:00 PM
                  eDRAM too expensiveMaynard Handley2019/01/14 01:43 PM
                    eDRAM too expensiveDan Fay2019/01/14 02:16 PM
                      eDRAM too expensiveMaynard Handley2019/01/14 03:40 PM
                        eDRAM too expensiveDan Fay2019/01/14 04:58 PM
                    eDRAM too expensivesomeone2019/01/15 08:20 AM
                eDRAM too expensiveanon2019/01/14 03:34 PM
                  eDRAM too expensiveMaynard Handley2019/01/14 05:34 PM
                eDRAM too expensiveanon2019/01/15 01:06 AM
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              AMD IO dieMaynard Handley2019/01/14 10:42 AM
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                AMD IO diejuanrga2019/01/15 02:54 AM
                AMD IO die size & functionalityWes Felter2019/01/15 11:12 AM
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                      AMD CPU die size & functionalityanon2019/01/16 01:32 AM
                        AMD CPU die size & functionalityAlberto2019/01/16 05:40 AM
                      AMD CPU die size & functionalityJan Olšan2019/01/16 07:11 AM
                  AMD IO die size & functionalityMaynard Handley2019/01/16 09:17 AM
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