AMD IO die size & functionality

By: Maynard Handley (name99.delete@this.name99.org), January 16, 2019 9:17 am
Room: Moderated Discussions
Wes Felter (wmf.delete@this.felter.org) on January 15, 2019 11:12 am wrote:
> Maynard Handley (name99.delete@this.name99.org) on January 14, 2019 10:42 am wrote:
> > juanrga (no.delete@this.juanrga.com) on January 14, 2019 3:04 am wrote:
>
> > > And there is no eDRAM. As proven before, there is no enough space in the IO
> > > die for a meaningful L4. Also Sandra database and codenames of engineering/qualification
> > > samples prove there is only up to L3 from client to server.
> >
> > Can you point to this analysis ("As proven before, there is no enough space in the IO
> > die for a meaningful L4")? Thanks.
>
> As I said elsewhere (and several other people have done the same math):
>
> The Zeppelin (Ryzen 1xxx) die is 212 mm2 and its CCXs are 88 mm2 leaving 124 mm2 for the uncore. Now
> we see that the Matisse (Ryzen 3xxx) IO die is 122 mm2 — virtually the same size on the same process
> for the same functionality. I know this is highly simplistic but it makes a lot of sense.
>
> And if you multiply the 124 mm2 by 4 for Rome you get 500 mm2 while the Rome IO
> die is smaller (there is presumably redundant stuff that can be eliminated), so
> I don't see room for L4 there either, although maybe a snoop filter would be nice.

Thanks for the details. I guess you are correct. This annotated die shot here (best I can find)
http://dresdenboy.blogspot.com/2016/08/some-last-chance-pre-hot-chips.html more or less confirms your hypotheses and numbers. Even so there is a lot of area there (eg the stuff labelled Memory Encryption?) that has who knows what functionality.

The larger (interesting) point, I guess, is the ever-shrinking CPU. We are used to this on SoCs where CPU (and even CPU+GPU) is just one small island along with ISP, crypto, NPU, and god knows what else. But I didn't have a gut feel for the extent to which the same is becoming true for desktop chips. Of course the underlying reason (inability to shrink PHYs) is different, but the end results is the same. (At least for now; presumably this is just one more piece of [very visual] evidence for why the future is IO on a separate chiplet. Presumably over the next year or two we'll have both IBM and the ARM servers going the same route?)
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      AMD CESAlberto2019/01/11 10:13 AM
        AMD CESJS2019/01/12 01:05 AM
          AMD IO dieanon³2019/01/13 01:17 PM
            AMD IO dieanon2019/01/13 02:26 PM
            eDRAM too expensiveDavid Kanter2019/01/13 02:34 PM
              eDRAM too expensiveAdrian2019/01/13 08:51 PM
                eDRAM too expensiveAdrian2019/01/13 09:01 PM
                eDRAM too expensiveRicardo B2019/01/14 11:06 AM
                  Zen PHY speedsJeff S.2019/01/14 11:40 AM
                  eDRAM too expensiveAdrian2019/01/14 12:44 PM
                    Zen target process (was: eDRAM too expensive)hobold2019/01/14 02:42 PM
                      Zen target process (was: eDRAM too expensive)Adrian2019/01/14 09:13 PM
                        Zen target process (was: eDRAM too expensive)hobold2019/01/15 08:28 PM
                    eDRAM too expensiveRicardo B2019/01/15 03:40 AM
                    eDRAM too expensiveRicardo B2019/01/15 08:26 AM
              eDRAM too expensiveMaynard Handley2019/01/14 10:38 AM
                eDRAM too expensiveanon2019/01/14 01:00 PM
                  eDRAM too expensiveMaynard Handley2019/01/14 01:43 PM
                    eDRAM too expensiveDan Fay2019/01/14 02:16 PM
                      eDRAM too expensiveMaynard Handley2019/01/14 03:40 PM
                        eDRAM too expensiveDan Fay2019/01/14 04:58 PM
                    eDRAM too expensivesomeone2019/01/15 08:20 AM
                eDRAM too expensiveanon2019/01/14 03:34 PM
                  eDRAM too expensiveMaynard Handley2019/01/14 05:34 PM
                eDRAM too expensiveanon2019/01/15 01:06 AM
            AMD IO diejuanrga2019/01/14 03:04 AM
              AMD IO dieMaynard Handley2019/01/14 10:42 AM
                AMD IO dieAlberto2019/01/14 02:00 PM
                AMD IO diejuanrga2019/01/15 02:54 AM
                AMD IO die size & functionalityWes Felter2019/01/15 11:12 AM
                  AMD IO die size & functionalityjuanrga2019/01/15 11:43 AM
                  AMD IO die size & functionalityAlberto2019/01/15 12:57 PM
                    AMD CPU die size & functionalityWes Felter2019/01/15 04:35 PM
                      AMD CPU die size & functionalityanon2019/01/16 01:32 AM
                        AMD CPU die size & functionalityAlberto2019/01/16 05:40 AM
                      AMD CPU die size & functionalityJan Olšan2019/01/16 07:11 AM
                  AMD IO die size & functionalityMaynard Handley2019/01/16 09:17 AM
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