Geoff Langdale (geoff.langdale.delete@this.gmail.com) on February 20, 2019 2:07 pm wrote:
> Linus Torvalds (torvalds.delete@this.linux-foundation.org) on February 20, 2019 9:36 am wrote:
> ...
> > And I have to say, I like the direction ARM is going with vector math a lot more than the
> > AVX512 that Intel is pushing. I don't know how well it works in practice, but the whole "let's
> > try to do something that works for different vector lengths" is laudable. I'm quite tired
> > of the model where Intel introduces yet another incompatible model every few years.
> >
> > I still will hold judgement until we actually see widely available hardware that people
> > actually can use for development and deployment. I've just seen too many promises and "released"
> > hardware that never went anywhere and nobody really had reasonably available.
> ...
>
> You like the direction. I like the direction. Sadly, it looks a lot like *ARM* doesn't particularly like the
> direction. They announced "Scalable" Vector Extensions in 2017 and they're not putting it in a 64-core chip
> they are shipping in 2020? So 3 years after the announcement, you will be able to run your SVE code on hardware
> scaling all the way from a Fujitsu Post-K to a Fujitsu Post-K. It doesn't inspire confidence.
>
> Oh, and between all that, they had time to introduce a *different* SIMD extension
> for the very low end. https://pages.arm.com/introduction-armv8.1m.html
>
> Like you say, this is a promise at this stage, and I'm withholding judgement too. But this is increasingly
> looking like MIPS's MDMX ("Mad Max") - a SIMD extension that had its best moments on paper.

I hope they won't do as Intel that still don't have AVX on all of their CPU more than
10 years after it was announced.
their CPU still don't support it.