DMA

By: RichardC (richard.cownie.delete@this.pobox.com), July 4, 2019 10:54 am
Room: Moderated Discussions
Simon Farnsworth (simon.delete@this.farnz.org.uk) on July 4, 2019 9:46 am wrote:
> RichardC (richard.cownie.delete@this.pobox.com) on July 4, 2019 5:52 am wrote:
> > Simon Farnsworth (simon.delete@this.farnz.org.uk) on July 4, 2019 4:09 am wrote:
> > > And MEMC had limited DMA read facilities, for sound and video - the lack of more sophisticated DMA
> > > implies to me, as an outsider, that DMA was something Acorn understood at the time, but felt was too
> > > complex for the price point they were aiming at. After all, the entire chipset was designed as a single
> > > project, so if they'd felt it worth building a more complex MEMC, they could have done so.
> >
> > You have to look at the whole system design, and you have to look at it the right
> > way round. It's not about the CPU or the various IO systems, it's about DRAM.
> >
>
>
> Just to check - we're agreeing from two different angles?

I think so. You're correct that's more DMA-ish functionality in the MEMC than I remembered.
And I agree that Acorn understood all these trade-offs very well indeed - possibly better
than anyone else in the world at that time, because many of the other mid-1980s systems blindly
copied minicomputer and mainframe architectural concepts requiring a lot of cost and complexity for no actual benefit. They were people who were willing to re-think the whole system from the ground
up, and weren't going to copy a feature from somewhere else unless it would pay its way.

>
> I'm saying that there's plenty of evidence that Acorn knew what a DMAC could do, had a limited form of
> DMA in the MEMC chip anyway for VIDC to use, and had experience from the Tube using a 6502 as an intelligent
> peripheral controller for 32016, Z80, 6502 and 80186 processors to know exactly what was and was not
> worth the tradeoffs for an affordable computer when designing ARM. In other words, leaving out DMA was
> not the result of ignorance, but a considered engineering decision backed by experience.

Absolutely.

> If I'm understanding you properly, you're looking at the ARM1/ARM2 design and pointing out
> that in that context, FIQ mode with its banked registers effectively turns the ARM1/ARM2 into
> the sort of DMAC Acorn would have designed for the chipset, and thus, as the CPU would be
> stopped while the DMAC ran, it was the right decision at the time (why have two devices where
> only one can run at a time, when you can have one device fill both functions?).

Agreed.

It's generally difficult for people today to imagine a world with no caches at all. But that's how
it was for ARM-1 and ARM-2, and also for the Sun-4/110. In a cacheless system the CPU core has to be very tightly coupled to the main memory (DRAM) system.

> And, to go back to my previous question; in the historical context, did Acorn make any decisions where they
> had two equally sensible alternatives to choose from, and chose the wrong option from a 2019 perspective?

> Etienne points out that memory mapped I/O could fall into that category (although
> I disagree as MEMC is a capable enough MMU to treat I/O and DRAM differently,
> and a well-designed cache can mark out the MMIO region as uncacheable).
>
> I don't see anything in ARM2 where Acorn could have achieved their goals
> with different decisions, at least not to the degree that they did.

I think the ARM-1/ARM-2 CPUs were awesome and the decisions hold up well. The MEMC went out
on a limb in having (IIRC) an entry for each of 128 physical pages, and using content-addressable
lookup on those 128 virtual tags to get to a physical page. Which meant you had page size proportional to system memory size (yeuch!), and no way to have multiple virtual addresses
for the same physical page (double yeuch!). Which made it insanely horrible for porting
any kind of Unix or conventional OS. Acorn didn't worry too much about that because they were
writing their own OS as well (and actually ended up writing two OSes, but that's another story).
But again, if you look at from another angle they were providing *some* kind of VM+protection
functionality at a price point where no-one else had it at all, so it made some kind of sense
at the time and in the context of the intended market.

> I think the decisions made to get from ARM2 to ARM3 are, with 20/20 hindsight, not right
> (VIVT cache in the ARM3, SWP and SWPB instead of a single CMPSWP instruction or an extremely
> constrained LDREX/STREX pair - one that fails the store if the CPU is interrupted during
> the critical sequence by anything, and a new bus line for "interrupt LDREX/STREX").

IIRC I left Acorn in mid-1988, before ARM-3, so I don't have much insight into that and
later CPUs. The designers were cycle-counters and speed freaks, so that's probably why the
VIVT cache was favored. But knowing them as I did, they always had good reasons for their
unconventional design choices at the time.

> 2. Prepare for the shift to 32-bit addressing from the beginning; while R15 would still be both PSR
> and PC in ARM1/ARM2 (thus only 26 bits provide "live" address lines), you'd have MSR/MRS from day
> 1, and you'd have to use them to access the PSR, so that ARMv3 would not need separate 32 bit and
> 26 bit User modes - instead, you'd have the problem Apple Classic MacOS developers will remember going
> from 68000 to 68020, as formerly ignored bits of the address become valid all of a sudden.

Yes, I think they really did regret that one - packing the condition codes into spare bits of the PC is one of those "seemed like a good idea at the time" tricks that had to be changed uncomfortable soon.

> Other than that, everything I can see different between ARMv8-A 32 bit mode and ARMv2a and earlier falls
> into the category of "things that would have made the A440 impossible at a sensible price point in 1987
> had they been implemented", or "things that would have made the A440 slower for no obvious gain".

Totally agree. Getting that level of performance and functionality for well under 1000 pounds was a tough target which required unconventional solutions, they came up with a lot of tricks to do it and almost all of the tricks worked out well.


< Previous Post in ThreadNext Post in Thread >
TopicPosted ByDate
ARM1/ARM2 Alternative? (20/20 Hindsight)Paul A. Clayton2019/06/27 05:47 PM
  ARM1/ARM2 Alternative? (20/20 Hindsight)Maxwell2019/06/27 08:10 PM
    ARM1/ARM2 Alternative? (20/20 Hindsight)Paul A. Clayton2019/06/28 11:44 AM
      ARM1/ARM2 Alternative? (20/20 Hindsight)RichardC2019/07/03 07:56 PM
        ARM1/ARM2 Alternative? (20/20 Hindsight)Simon Farnsworth2019/07/04 04:09 AM
          DMARichardC2019/07/04 05:52 AM
            DMASimon Farnsworth2019/07/04 09:46 AM
              DMARichardC2019/07/04 10:54 AM
                DMAanon2019/07/04 05:53 PM
                  DMASimon Farnsworth2019/07/05 01:51 AM
                  DMARichardC2019/07/05 08:24 PM
            DMAMaxwell2019/07/04 09:49 AM
              DMAHoward Chu2019/07/04 10:55 AM
              DMARichardC2019/07/04 11:00 AM
          ARM1/ARM2 Alternative? (20/20 Hindsight)Etienne2019/07/04 08:06 AM
            ok once you have MMURichardC2019/07/04 08:46 AM
  ARM1/ARM2 Alternative? (20/20 Hindsight)Etienne2019/06/28 01:52 AM
  ARM1/ARM2 Alternative? (20/20 Hindsight)jv2019/06/28 07:20 AM
    ARM1/ARM2 Alternative? (20/20 Hindsight)Paul A. Clayton2019/06/28 11:44 AM
      ARM1/ARM2 Alternative? (20/20 Hindsight)jv2019/06/29 03:54 AM
        Freeing the stack pointerPaul A. Clayton2019/06/29 06:32 AM
          PC-relative LD/ST (NT)vvid2019/06/30 10:03 AM
          Freeing the stack pointerjv2019/06/30 11:45 PM
  ARM1/ARM2 Alternative? (20/20 Hindsight)Ronald Maas2019/06/28 09:06 AM
    ARM1/ARM2 Alternative? (20/20 Hindsight)Paul A. Clayton2019/06/28 12:56 PM
      ARM1/ARM2 Alternative? (20/20 Hindsight)Ronald Maas2019/06/28 10:17 PM
        ARM1/ARM2 Alternative? (20/20 Hindsight)Brett2019/06/29 12:39 AM
          ARM1/ARM2 Alternative? (20/20 Hindsight)Brett2019/06/29 01:13 AM
          32-bit Win10 exists (NT)nobody in particular2019/06/29 05:17 PM
            32-bit Win10 existsBrett2019/06/29 06:45 PM
              32-bit Win10 existsMichael S2019/06/30 01:34 AM
                32-bit Win10 existsAnon32019/06/30 03:07 AM
        AArch64 is a new ISAPaul A. Clayton2019/06/29 07:23 AM
          AArch64 is a new ISArwessel2019/06/29 04:00 PM
            AArch64 is a new ISAMichael S2019/06/30 01:40 AM
              Hardware x87?Gionatan Danti2019/06/30 02:22 AM
                Hardware x87?Michael S2019/06/30 03:52 AM
                  Hardware x87?Gionatan Danti2019/06/30 06:04 AM
                    Hardware x87?Michael S2019/06/30 08:47 AM
                  Hardware x87?Kevin G2019/07/01 12:11 PM
                    Hardware x87?anonymou52019/07/01 07:30 PM
                      Hardware x87?Michael S2019/07/02 12:44 AM
                      Hardware x87?Gionatan Danti2019/07/02 09:25 AM
              AArch64 is a new ISArwessel2019/06/30 01:52 PM
            AArch64 is a new ISAMichael S2019/06/30 01:42 AM
        ARM1/ARM2 Alternative? (20/20 Hindsight)Maynard Handley2019/06/29 09:50 AM
        ARM1/ARM2 Alternative? (20/20 Hindsight)Michael S2019/06/30 01:29 AM
          ARM1/ARM2 Alternative? (20/20 Hindsight)Wilco2019/06/30 03:51 AM
            ARM1/ARM2 Alternative? (20/20 Hindsight)Michael S2019/06/30 04:22 AM
              ARM1/ARM2 Alternative? (20/20 Hindsight)Wilco2019/06/30 05:27 AM
                ARM1/ARM2 Alternative? (20/20 Hindsight)Michael S2019/06/30 05:53 AM
                  ARM1/ARM2 Alternative? (20/20 Hindsight)Wilco2019/07/02 01:49 AM
                    ARM1/ARM2 Alternative? (20/20 Hindsight)Michael S2019/07/02 04:24 AM
                      ARM1/ARM2 Alternative? (20/20 Hindsight)Wilco2019/07/02 05:28 PM
                        ARM1/ARM2 Alternative? (20/20 Hindsight)Michael S2019/07/03 01:37 AM
                          ARM1/ARM2 Alternative? (20/20 Hindsight)Adrian2019/07/03 02:45 AM
                            ARM1/ARM2 Alternative? (20/20 Hindsight)Michael S2019/07/03 03:01 AM
                            ARM1/ARM2 Alternative? (20/20 Hindsight)Montaray Jack2019/07/03 12:18 PM
                              ARM1/ARM2 Alternative? (20/20 Hindsight)Montaray Jack2019/07/03 01:46 PM
                        ARM1/ARM2 Alternative? (20/20 Hindsight)Montaray Jack2019/07/03 02:32 PM
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